Abhijit Dharchoudhury

发表

Emerging power management tools for processor design

Rajendran Panda, Abhijit Dharchoudhury, Tim Edwards, 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

Worst-case analysis and optimization of VLSI circuit performances

Sung-Mo Kang, Abhijit Dharchoudhury, S. Kang, 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Library-less synthesis for static CMOS combinational logic circuits

Rajendran Panda, Abhijit Dharchoudhury, David Blaauw, 1997, ICCAD 1997.

A three-tier assertion technique for SPICE verification of transistor level timing analysis

Abhijit Dharchoudhury, David Blaauw, Savithri Sundareswaran, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Fast timing simulation of transient faults in digital circuits

Sung-Mo Kang, Janak H. Patel, Abhijit Dharchoudhury, 1994, ICCAD.

CMOS combinational circuit sizing by stage-wise tapering

Rajendran Panda, Abhijit Dharchoudhury, Satyamurthy Pullela, 1998, Proceedings Design, Automation and Test in Europe.

Timing and Signal Integrity Analysis

Abhijit Dharchoudhury, David Blaauw, Steve M. Kang, 1999, The VLSI Handbook.

ICET: a complete chip-level thermal reliability diagnosis tool for CMOS VLSI chips

Sung-Mo Kang, Abhijit Dharchoudhury, Elyse Rosenbaum, 1996, DAC '96.

Stand-by power minimization through simultaneous threshold voltage selection and circuit sizing

Rajendran Panda, Abhijit Dharchoudhury, Tim Edwards, 1999, DAC '99.

Fast and accurate timing simulation with regionwise quadratic models of MOS I-V characteristics

Sung-Mo Kang, Abhijit Dharchoudhury, K. H. Kim, 1994, ICCAD.

An integrated approach to realistic worst-case design optimization of MOS analog circuits

Sung-Mo Kang, Abhijit Dharchoudhury, S. Kang, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

Design and analysis of power distribution networks in PowerPC microprocessors

Rajendran Panda, Abhijit Dharchoudhury, David Blaauw, 1998, DAC.

Library-less synthesis for static CMOS combinational logic circuits

Rajendran Panda, Abhijit Dharchoudhury, David Blaauw, 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Transistor-level sizing and timing verification of domino circuits in the Power PC/sup TM/ microprocessor

Abhijit Dharchoudhury, David Blaauw, Satyamurthy Pullela, 1997, Proceedings International Conference on Computer Design VLSI in Computers and Processors.