S. Wind

High performance 0.1 /spl mu/m CMOS devices with 1.5 V power supply

Yuan Taur, Keith A. Jenkins, P. J. Coane, 1993, Proceedings of IEEE International Electron Devices Meeting.

Carbon nanotube field effect transistors - fabrication, device physics, and circuit implications

R. Martel, V. Derycke, H. Wong, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

High-performance 0.07-μm CMOS with 9.5-ps gate delay and 150 GHz f/sub T/

Y. Taur, C. Wann, F. Assaderaghi, 1997, IEEE Electron Device Letters.

Carbon nanotube field-effect transistors and logic circuits

R. Martel, V. Derycke, S. Wind, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

High transconductance 0.1 mu m pMOSFET

Y. Taur, T. Lii, D. Quinlan, 1992, 1992 International Technical Digest on Electron Devices Meeting.

Experimental 0.1 mu m p-channel MOSFET with p/sup +/-polysilicon gate on 35 AA gate oxide

Y. Taur, T. Lii, D. Quinlan, 1993, IEEE Electron Device Letters.

Sub-50 nm half-pitch imaging with a low activation energy chemically amplified photoresist

Martha I. Sanchez, Gregory M. Wallraff, William D. Hinsberg, 2004 .

New polysilicon disposable sidewall process for sub-50 nm CMOS

Y. Taur, R. Miller, P. Kozlowski, 2001, 31st European Solid-State Device Research Conference.