I. Fukushi

发表

Revision of the Japanese Architectural Standard Specification for Precast Reinforced Concrete Work

H. Sugiyama, I. Fukushi, 2003 .

Low-power SRAM design using half-swing pulse-mode techniques

Ron Ho, Bharadwaj Amrutur, Mark Horowitz, 1998, IEEE J. Solid State Circuits.

An 8-way VLIW embedded multimedia processor built in 7-layer metal 0.11 /spl mu/m CMOS technology

Y. Asada, A. Suga, N. Higaki, 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

A 1 V 0.9 mW at 100 MHz 2 k/spl times/16 b SRAM utilizing a half-swing pulsed-decoder and write-bus architecture in 0.25 /spl mu/m dual-Vt CMOS

T. Izawa, M. Horowitz, S. Mitarai, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A 1 V, 10.4 mW low power DSP core for mobile wireless use

R. Ohe, I. Fukushi, T. Shiota, 1999, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).

High-speed cascode sensing scheme for 1.0 V contact-programming mask ROM

I. Fukushi, M. Hamaminato, S. Kawashima, 1999, 1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).