Lihan Ju

PeRex: A Power Efficient FPGA-based Architecture for Regular Expression Matching

Tianzhou Chen, Xingsheng Tang, Yuan Wen, 2011, 2011 IEEE/ACM International Conference on Green Computing and Communications.

Block-based hardware scheduler design on Many-core architecture

Tianzhou Chen, Minghui Wu, Lihan Ju, 2012, 2012 IEEE International Symposium on Industrial Electronics.

Global Register Alias Table: Executing Sequential Program on Multi-Core

Di Wu, Tianzhou Chen, Wei Hu, 2010, 2010 10th IEEE International Conference on Computer and Information Technology.

Bhs: An Novel Scheduling Strategy on Modern Processors

Tianzhou Chen, Xingsheng Tang, Yuan Wen, 2011 .

Homogeneous NoC-based FPGA: The Foundation for Virtual FPGA

Jie Yang, Tianzhou Chen, Shaobin Zhang, 2010, 2010 10th IEEE International Conference on Computer and Information Technology.

Distributed On-Chip Operating System for Network on Chip

Tianzhou Chen, Wei Hu, Binbin Wu, 2010, 2010 10th IEEE International Conference on Computer and Information Technology.

Shared Register File Based ILP for Multicore

Tianzhou Chen, Wei Hu, Lihan Ju, 2010, 2010 IEEE/ACM Int'l Conference on Green Computing and Communications & Int'l Conference on Cyber, Physical and Social Computing.

Single Thread Program Parallelism with Dataflow Abstracting Thread

Tianzhou Chen, Xingsheng Tang, Qingsong Shi, 2010, ICA3PP.