Clarence W. Teng

A quantitative physical model for the band-to-band tunneling-induced substrate hot electron injection in MOS devices

Ih-Chin Chen, I. Chen, Clarence W. Teng, 1992 .

Optimization of sidewall masked isolation process

W. R. Hunter, Clarence W. Teng, G. Pollack, 1985 .

DRAM technology trend

Clarence W. Teng, 1995, 1995 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers.

A 64 Mbit DRAM trench capacitor cell with field-plate isolation

Ih-Chin Chen, Clarence W. Teng, Y. Okumoto, 1991, 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers.