N.I. Lee

Manufacturable embedded CMOS 6T-SRAM technology with high-k gate dielectric device for system-on-chip applications

H.S. Kang, D.H. Lee, H.K. Kang, 2002, Digest. International Electron Devices Meeting,.

Thermally robust Ta-doped Ni SALICIDE process promising for sub-50 nm CMOSFETs

S. Choi, J. Ku, N. Lee, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

50nm gate length logic technology with 9-layer Cu interconnects for 90nm node SoC applications

M.H. Park, H.S. Kang, D.H. Lee, 2002, Digest. International Electron Devices Meeting,.

Highly manufacturable SONOS non-volatile memory for the embedded SoC solution

K.C. Kim, M.K. Seo, M.C. Kim, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Novel cell structure of PRAM with thin metal layer inserted GeSbTe

U-In Chung, Y.T. Kim, S.Y. Lee, 2003, IEEE International Electron Devices Meeting 2003.