Philip Godoy

9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation

Xiang Li, Li Lin, Fan Zhang, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

Nested chopper stabilization in analog multipliers and mixers

Philip Godoy, 2008 .

20.5 A 40nm dual-band 3-stream 802.11a/b/g/n/ac MIMO WLAN SoC with 1.1Gb/s over-the-air throughput

Li Lin, Xiaoyue Wang, Ming He, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

13.7 A 0.23mm2 digital power amplifier with hybrid time/amplitude control achieving 22.5dBm at 28% PAE for 802.11g

Li Lin, Hao Li, Yuan Fang, 2017, 2017 IEEE International Solid-State Circuits Conference (ISSCC).

A dual core power combining digital power amplifier for 802.11b/g/n with +26.8dBm linear output power in 28nm CMOS

Hao Li, Randy Tsang, Renaldi Winoto, 2017, 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).