K. Ikeda

High Performance 60 nm Gate Length Germanium p-MOSFETs with Ni Germanide Metal Source/Drain

K. Suzuki, S. Takagi, K. Ikeda, 2007, 2007 IEEE International Electron Devices Meeting.

Gate dielectric formation and MIS interface characterization on Ge

Shinichi Takagi, Hiroshi Kumagai, Tatsuro Maeda, 2007 .

High mobility Ge-on-insulator p-channel MOSFETs using Pt germanide Schottky source/drain

T. Tezuka, S. Takagi, S. Nakaharai, 2005, IEEE Electron Device Letters.

Formation of HfSiON/SiO/sub 2//Si-substrate gate stack with low leakage current for high-performance high-/spl kappa/ MISFETs

M. Yamaguchi, T. Sakoda, H. Minakata, 2006, IEEE Transactions on Electron Devices.

50-nm gate Schottky source/drain p-MOSFETs with a SiGe channel

Y. Yamashita, T. Mimura, A. Endoh, 2002, IEEE Electron Device Letters.

Ti-capping technique as a breakthrough for achieving low threshold voltage, high mobility, and high reliability of pMOSFET with metal gate and high-k dielectrics technologies

Y. Nara, H. Morioka, N. Tamura, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

High Performance Sub-40 nm Bulk CMOS with Dopant Confinement Layer (DCL) technique as a Strain Booster

S. Satoh, T. Sugii, H. Ohta, 2007, 2007 IEEE International Electron Devices Meeting.

High-Performance and Low-Power Bulk Logic Platform Utilizing FET Specific Multiple-Stressors with Highly Enhanced Strain and Full-Porous Low-k Interconnects for 45-nm CMOS Technology

T. Miyashita, Y. Sambonsugi, T. Sugii, 2007, 2007 IEEE International Electron Devices Meeting.