J. Sun

Anomalous short-channel effects in 0.1 /spl mu/m MOSFETs

R. Logan, P. Agnello, J. Snare, 1996, International Electron Devices Meeting. Technical Digest.

Very Thin Nitride/Oxide Composite Gate Insulator for VLSI CMOS

Y. Taur, L. Dori, S. Basavaiah, 1987, 1987 Symposium on VLSI Technology. Digest of Technical Papers.

A high-performance 0.08 /spl mu/m CMOS

E. Nowak, A. Ray, P. Agnello, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

A high density 0.10 /spl mu/m CMOS technology using low K dielectric and copper interconnect

D. Reber, G. Yeap, M. Aminpur, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).