K. Kinoshita

Advanced scalable ultralow-k/Cu interconnect technology for 32 nm CMOS ULSI using self-assembled porous silica and self-aligned CoWP barrier

K. Kohmura, T. Yoshino, N. Hata, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Via-Shape-Control for Copper Dual-Damascene Interconnects With Low-k Organic Film

T. Kikkawa, M. Tada, Y. Hayashi, 2008, IEEE Transactions on Semiconductor Manufacturing.

Novel self-assembled ultra-low-k porous silica films with high mechanical strength for 45 nm BEOL technology

K. Kohmura, Y. Sonoda, T. Yoshino, 2003, IEEE International Electron Devices Meeting 2003.

32 nm node Ultralow-k(k=2.1)/Cu Damascene Multilevel Interconnect using High-Porosity (50 %) High-Modulus (9 GPa) Self-Assembled Porous Silica

K. Kohmura, N. Hata, T. Kikkawa, 2007, 2007 IEEE International Electron Devices Meeting.

Advanced devices and packaging of Si-photonics-based optical transceiver for optical interconnection

K. Kurata, Y. Hagihara, J. Fujikata, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

Extraction of process-induced damage in low-k/Cu damascene structure

K. Kohmura, T. Yoshino, N. Hata, 2005, ISSM 2005, IEEE International Symposium on Semiconductor Manufacturing, 2005..