A. Lagha

Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm2 6T-SRAM bitcell

O. Faynot, V. Arnal, A. Vandooren, 2007, 2007 IEEE International Electron Devices Meeting.

Process monitoring and surface characterization with in-line XPS metrology

M. Aminpur, B. Dickson, N. Cabuil, 2007 .

Manufacturability and Speed Performance Demonstration of Porous ULK (k=2.5) for a 45nm CMOS Platform

M. Haond, P. Ferreira, C. Cregut, 2007, 2007 IEEE Symposium on VLSI Technology.