Sheng-Han Yeh

Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips

Tsung-Wei Huang, Tsung-Yi Ho, Sheng-Han Yeh, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

An ILP-Based Routing Algorithm for Pin-Constrained EWOD Chips With Obstacle Avoidance

Tsung-Wei Huang, Tsung-Yi Ho, Sheng-Han Yeh, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Reliability-Driven Chip-Level Design for High-Frequency Digital Microfluidic Biochips

Tsung-Yi Ho, Sheng-Han Yeh, Shang-Tsung Yu, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Reliability-Driven Chip-Level Design for High-Frequency Digital Microfluidic Biochips

Tsung-Yi Ho, Sheng-Han Yeh, Shang-Tsung Yu, 2015, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Integrated Fluidic-Chip Co-Design Methodology for Digital Microfluidic Biochips

Tsung-Wei Huang, Tsung-Yi Ho, Sheng-Han Yeh, 2013, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Voltage-Aware Chip-Level Design for Reliability-Driven Pin-Constrained EWOD Chips

Tsung-Wei Huang, Tsung-Yi Ho, Sheng-Han Yeh, 2014, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..