P. Wambacq

Analog and RF circuits in 45 nm CMOS and below: planar bulk versus FinFET

B. Parvais, A. Mercha, S. Decoutere, 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

First demonstration of III-V HBTs on 300 mm Si substrates using nano-ridge engineering

M. Ingels, B. Parvais, L. Witters, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

Compact modeling of nonlinear distortion in analog communication circuits

I. Bolsens, S. Donnay, M. Engels, 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

CMOS-compatible GaN-based devices on 200mm-Si for RF applications: Integration and Performance

B. Parvais, E. Simoen, N. Waldron, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients

H. De Man, M. Badaroglu, G. Gielen, 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

Modeling and experimental verification of substrate coupling and isolation techniques in mixed-signal ICs on a lightly-doped substrate

G. Van der Plas, M. Badaroglu, S. Donnay, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

A 7.6 mW 1.75 GS/s 5 bit flash A/D converter in 90 nm digital CMOS

G. Van der Plas, M. Kuijk, B. Verbruggen, 2008, 2008 IEEE Symposium on VLSI Circuits.