María C. Molina

发表

Performance-driven scheduling of behavioural specifications

Jose Manuel Mendias, María C. Molina, Rafael Ruiz-Sautua, 2009, Integr..

Enhanced gradient-based motion vector coprocessor

Luís Parrilla Roure, Guillermo Botella Juan, Uwe Meyer-Bäse, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Multiple-precision circuits allocation independent of data-objects length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2011, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Power optimization in heterogenous datapaths

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2011, 2011 Design, Automation & Test in Europe.

Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications

Román Hermida, María C. Molina, Rafael Ruiz-Sautua, 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Behavioural bitwise scheduling based on computational effort balancing

Román Hermida, Jose Manuel Mendias, María C. Molina, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Subword Switching Activity Minimization to Optimize Dynamic Power Consumption

Jose Manuel Mendias, Alberto A. Del Barrio, María C. Molina, 2009, IEEE Design & Test of Computers.

Efficient verification of scheduling, allocation and binding in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis

Román Hermida, Jose Manuel Mendias, Alberto A. Del Barrio, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, PATMOS.

Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis

Jose Manuel Mendias, María C. Molina, Rafael Ruiz-Sautua, 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Multispeculative additive trees in High-Level Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Bit-level scheduling of heterogeneous behavioural specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002..

Using Speculative Functional Units in high level synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Area Optimization of Multi-Cycle Operators in High-Level Synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Robust Bioinspired Architecture for Optical-Flow Computation

Eduardo Ros Vidal, Guillermo Botella Juan, Uwe Meyer-Bäse, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits

Guillermo Botella Juan, María C. Molina, Rafael Ruiz-Sautua, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Arrival time aware scheduling to minimize clock cycle length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Multispeculative Addition Applied to Datapath Synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2013, Integr..

Behavioural transformation to improve circuit performance in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, Design, Automation and Test in Europe.

Improving circuit performance with multispeculative additive trees in high-level synthesis

Román Hermida, Jose Manuel Mendias, Seda Ogrenci Memik, 2014, Microelectron. J..

Behavioural scheduling to balance the bit-level computational effort

Román Hermida, Jose Manuel Mendias, María C. Molina, 2004, IEEE Computer Society Annual Symposium on VLSI.

Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, J. Syst. Archit..

Execution condition analysis in high level synthesis: a unified approach

Jose Manuel Mendias, María C. Molina, Olga Peñalba, 2000, ISSS '00.

High-level synthesis of multiple-precision circuits independent of data-objects length

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, DAC '02.

High-level allocation to minimize internal hardware wastage [high-level synthesis]

Román Hermida, Jose Manuel Mendias, María C. Molina, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Bitwise scheduling to balance the computational cost of behavioral specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Applying speculation techniques to implement functional units

Román Hermida, Francisco Tirado, Jose Manuel Mendias, 2008, 2008 IEEE International Conference on Computer Design.

Pre-synthesis Optimization of Multiplications to Improve Circuit Performance

Román Hermida, Jose Manuel Mendias, María C. Molina, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Bit-level allocation of multiple-precision specifications

Román Hermida, Jose Manuel Mendias, María C. Molina, 2002, Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools.

Performance-driven read-after-write dependencies softening in high-level synthesis

Román Hermida, Jose Manuel Mendias, María C. Molina, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..