Ying-Ren Lee

Seamlessly Pipelined Shift-and-Add Circuits Based on Precise Delay Analysis and Its Applications

Tso-Bing Juang, Ying-Ren Lee, 2016, 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Low-cost concurrent error detection schemes for logarithmic converters

Tso-Bing Juang, Ying-Ren Lee, Chin-Chieh Chiu, 2016, 2016 International SoC Design Conference (ISOCC).

Low-area implementations of concurrent error detection logarithmic processors

Tso-Bing Juang, Ying-Ren Lee, 2017, 2017 International SoC Design Conference (ISOCC).