Z. Marrakchi

发表

Pulping and papermaking properties of Tunisian Alfa stems (Stipa tenacissima)—Effects of refining process

R. Khiari, É. Mauret, Z. Marrakchi, 2011 .

Three-Dimensional Thermal Modeling: Tools and Methodologies

H. Mehrez, Z. Marrakchi, V. Pangracious, 2015 .

New lignocellulosic fibres-reinforced composite materials: A stepforward in the valorisation of the Posidonia oceanica balls

M. Belgacem, R. Khiari, É. Mauret, 2011 .

Biocomposites based on polycaprolactone reinforced with alfa fibre mats

M. Belgacem, É. Mauret, Z. Marrakchi, 2012 .

FPGA Interconnect Topologies Exploration

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, Int. J. Reconfigurable Comput..

Efficient Mesh of Tree Interconnect for FPGA Architecture

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2007, 2007 International Conference on Field-Programmable Technology.

Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2007, First International Symposium on Networks-on-Chip (NOCS'07).

Performances comparison between multilevel hierarchical and mesh FPGA interconnects

Z. Marrakchi, H. Mehrez, H. Mrabet, 2006, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006..

Performances improvement of FPGA using novel multilevel hierarchical interconnection structure

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2006, 2006 IEEE/ACM International Conference on Computer Aided Design.

FPGA Architectures: An Overview

Zied Marrakchi, Habib Mehrez, Umer Farooq, 2012 .

Development and Analysis of Novel Mesh of Tree-based embedded FPGA

M. Abid, Z. Marrakchi, A. Obeid, 2022, The Journal of Supercomputing.

A Survey and Comparative Study of Embedded FPGA Architectures

M. Abid, Z. Marrakchi, A. Obeid, 2020 .

Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA

Zied Marrakchi, Habib Mehrez, Umer Farooq, 2013, Microelectron. J..

Iterative Routing Algorithm of Inter-FPGA Signals for Multi-FPGA Prototyping Platform

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2013, ARC.

Two Dimensional FPGAs: Configuration and CAD Flow

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015 .

New Coarse-Grained Configurable Architecture for DSP Applications

Zied Marrakchi, Habib Mehrez, Mohamed Abid, 2015 .

Frequency Optimization Objective during System Prototyping on Multi-FPGA Platform

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2013, Int. J. Reconfigurable Comput..

FPGA Interconnect Topologies Exploration

Umer Farooq, H. Mehrez, Z. Marrakchi, 2009 .

Mesh of Trees FPGA Architecture: Exploration and Optimization

Zied Marrakchi, Mohamed Abid, Sonda Chtourou, 2022, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Field Programmable Gate Arrays: An Overview

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015 .

Three-Dimensional Integration: A More Than Moore Technology

H. Mehrez, Z. Marrakchi, V. Pangracious, 2015 .

Exploration of Clustering Algorithms effects on Mesh of Clusters based FPGA Architecture Performance

Zied Marrakchi, Mohamed Abid, Khouloud Bouaziz, 2019, 2019 International Conference on High Performance Computing & Simulation (HPCS).

Impact of Clustering Algorithms on the performance of Multilevel Switch Boxes FPGA with Long Wires

Mohamed Abid, Zied Marrakchi, Khouloud Bouaziz, 2019, 2019 15th International Wireless Communications & Mobile Computing Conference (IWCMC).

On Exploiting Partitioning-Based Placement Approach for Performances Improvement of 3D FPGA

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2017, 2017 International Conference on High Performance Computing & Simulation (HPCS).

Performance analysis and optimization of cluster-based mesh FPGA architectures: design methodology and CAD tool support

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2017, Turkish J. Electr. Eng. Comput. Sci..

Embedded FPGA accelerator for Wireless Sensor Network nodes

Mohamed Abid, Zied Marrakchi, Mariem Turki, 2016, 2016 11th International Design & Test Symposium (IDT).

Design of advanced 2D and 3D FPGAs: Architecture-level exploration and algorithm-level optimization

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2016, 2016 11th International Design & Test Symposium (IDT).

Improvement of cluster-based Mesh FPGA architecture using novel hierarchical interconnect topology and long routing wires

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2016, Microprocess. Microsystems.

Exploration of Mesh-Based FPGA Architecture: Comparison of 2D and 3D Technologies in Terms of Power, Area and Performance

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2016, 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP).

An efficient Mesh-of-Tree based interconnect architecture for high performance 3D FPGAs

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015, 2015 6th Asia Symposium on Quality Electronic Design (ASQED).

Mesh of Clusters FPGA Architectures: Exploration Methodology and Interconnect Optimization

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2015, ARC.

Three-dimensional Mesh of Clusters: An alternative unified high performance interconnect architecture for 3D-FPGA implementation

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2014, 2014 International 3D Systems Integration Conference (3DIC).

Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA

Zied Marrakchi, Habib Mehrez, Lorena Anghel, 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.

Power consumption analysis for mesh based FPGA

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2014, 2014 9th IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS).

Power dissipation analysis for island-style FPGA architecture

Mohamed Abid, Zied Marrakchi, Habib Mehrez, 2014, 2014 5th International Conference on Information and Communication Systems (ICICS).

Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture

Zied Marrakchi, Habib Mehrez, Adrien Blanchardon, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

A defect-tolerant cluster in a mesh SRAM-based FPGA

Zied Marrakchi, Habib Mehrez, Mounir Benabdenbi, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2013, ARC.

A new heterogeneous tree-based application specific FPGA and its comparison with mesh-based application specific FPGA

Zied Marrakchi, Habib Mehrez, Umer Farooq, 2012, Microprocess. Microsystems.

A logic sharing synthesis tool for mutually exclusive applications

Z. Marrakchi, H. Mehrez, A. Kilic, 2012, 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era.

Application-Specific FPGA using heterogeneous logic blocks

Zied Marrakchi, Habib Mehrez, Husain Parvez, 2011, TRETS.

Differential pair routing to balance dual signals of WDDL designs in cluster-based Mesh FPGA

Zied Marrakchi, Habib Mehrez, Emna Amouri, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Security-centric FPGA CAD tools to balance dual-rail routing INWDDL designs

Zied Marrakchi, Habib Mehrez, Emna Amouri, 2011, 2011 VII Southern Conference on Programmable Logic (SPL).

Controlled placement and routing techniques to improve timing balance of WDDL designs in Mesh-based FPGA

Zied Marrakchi, Habib Mehrez, Emna Amouri, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

On the optimization of FPGA area depending on target applications

Zied Marrakchi, Habib Mehrez, Husain Parvez, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Impact of dual placement on WDDL design security in Mesh-based and Tree-based FPGAs

Zied Marrakchi, Habib Mehrez, Emna Amouri, 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics.

Application Specific FPGA Using Heterogeneous Logic Blocks

Zied Marrakchi, Habib Mehrez, Husain Parvez, 2010, ARC.

Improving the Security of Dual Rail Logic in FPGA Using Controlled Placement and Routing

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, 2009 International Conference on Reconfigurable Computing and FPGAs.

Placement and routing techniques to improve delay balance of WDDL netlist in MFPGA

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

The Effect of LUT and Cluster Size on a Tree Based FPGA Architecture

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2008, 2008 International Conference on Reconfigurable Computing and FPGAs.

Enhanced Methodology and Tools for Exploring Domain-Specific Coarse-Grained FPGAs

Zied Marrakchi, Habib Mehrez, Husain Parvez, 2008, 2008 International Conference on Reconfigurable Computing and FPGAs.

A new coarse-grained FPGA architecture exploration environment

Zied Marrakchi, Habib Mehrez, Umer Farooq, 2008, 2008 International Conference on Field-Programmable Technology.

Optimized local interconnect for cluster-based Mesh FPGA architecture

Z. Marrakchi, H. Mehrez, H. Mrabet, 2008, 2008 International Conference on Microelectronics.

Evaluation of Hierarchical FPGA partitioning methodologies based on architecture Rent Parameter

Z. Marrakchi, H. Mehrez, H. Mrabet, 2006, 2006 Ph.D. Research in Microelectronics and Electronics.

Hierarchical FPGA clustering based on multilevel partitioning approach to improve routability and reduce power dissipation

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2005, 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05).

Hierarchical FPGA clustering to improve routability

Z. Marrakchi, H. Mehrez, H. Mrabet, 2005, Research in Microelectronics and Electronics, 2005 PhD.

Automatic layout of scalable embedded field programmable gate array

Z. Marrakchi, H. Mehrez, H. Mrabet, 2004, International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04..

Performance analysis and optimization of high density tree-based 3 d multilevel FPGA

H. Mehrez, Z. Marrakchi, V. Pangracious, 2018 .

A Top-Down Optimization Methodology for Mutually Exclusive Applications

Zied Marrakchi, Habib Mehrez, Alp Kiliç, 2014, Int. J. Reconfigurable Comput..

Impact of Dual Placement and Routing on WDDL Netlist Security in FPGA

Zied Marrakchi, Habib Mehrez, Emna Amouri, 2013, Int. J. Reconfigurable Comput..

Efficient tree topology for FPGA interconnect network

Zied Marrakchi, Hayder Mrabet, Habib Mehrez, 2008, ACM Great Lakes Symposium on VLSI.

On wiring delays reduction of tree-based FPGA using 3-D fabric

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2014, 2014 27th IEEE International System-on-Chip Conference (SOCC).

Physical Design and Implementation of 3D Tree-Based FPGAs

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015 .

Three-Dimensional Tree-Based FPGA: Architecture Exploration Tools and Technologies

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015 .

Three-Dimensional FPGAs: Configuration and CAD Development

Zied Marrakchi, Habib Mehrez, Vinod Pangracious, 2015 .