S. Inoue

发表

Surface-free technology by laser annealing (SUFTLA) and its application to poly-Si TFT-LCDs on plastic film with integrated drivers

Tatsuya Shimoda, Satoshi Inoue, Sumio Utsunomiya, 2002 .

Fabrication of 120-nm-channel-length ferroelectric-gate thin-film transistor by nanoimprint lithography

T. Shimoda, E. Tokumitsu, S. Inoue, 2014 .

Low‐temperature poly‐Si TFT transferred onto plastic substrates by using surface free technology by laser ablation/annealing (SUFTLA®)

Tatsuya Shimoda, Satoshi Inoue, Sumio Utsunomiya, 2002 .

Electrophoretic displays driven by all‐oxide thin‐film transistor backplanes fabricated using a solution process

T. Shimoda, S. Inoue, T. T. Phan, 2015 .

Low-Temperature All-Solution-Derived Amorphous Oxide Thin-Film Transistors

Jinwang Li, T. Shimoda, S. Inoue, 2013, IEEE Electron Device Letters.

Combustion synthesized indium-tin-oxide (ITO) thin film for source/drain electrodes in all solution-processed oxide thin-film transistors

Y. Takamura, T. Shimoda, S. Inoue, 2016 .

Fabrication of source and drain regions of self-aligned ZrInZnO thin-film transistors using a solution of tin and poly(propylene carbonate)

T. Shimoda, S. Inoue, H. Tu, 2015 .

P-1: Distinguished Poster: Fabrication of a Self-Aligned ZrInZnO Thin-Film Transistor Using Polypropylene Carbonate Solution

T. Shimoda, S. Inoue, Fujimoto Nobutaka, 2014 .

P‐17: Development of Amorphous Oxide Thin Film Transistors Fabricated by a Total Solution Process for Display Application

Jinwang Li, T. Shimoda, S. Inoue, 2014 .

Investigation of solution-processed bismuth-niobium-oxide films

Yasuo Cho, T. Shimoda, E. Tokumitsu, 2014 .

Optical Interconnection in CMOS IC with Optical Waveguide and Heterogeneous Integrated Opto-devices

T. Shimoda, S. Inoue, T.-Y. Kondo, 2006, LEOS 2006 - 19th Annual Meeting of the IEEE Lasers and Electro-Optics Society.

High performance single grain si tfts inside a location-controlled grain by /spl mu/-czochralski process with capping layer

R. Ishihara, J. Metselaar, T. Shimoda, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Extraction Technique of Trap Density at Grain Boundaries in Polycrystalline-Silicon Thin-Film Transistors with Device Simulation

T. Shimoda, M. Kimura, S. Inoue, 2007 .

P‐1: Dependence of Poly‐Si TFT Characteristics on Oxide Interface Traps and Grain Boundary Traps and its Application to Diagnosis of Fabrication Processes

T. Shimoda, M. Kimura, S. Inoue, 2004 .

Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary for Polycrystalline Silicon Thin-Film Transistors

P. Migliorato, T. Shimoda, M. Kimura, 2001 .

Single-grain Si TFTs and circuits fabricated through advanced excimer-laser crystallization

R. Ishihara, W. Metselaar, K. Beenakker, 2008 .

Characterization of Local Electrical Property of Coincidence Site Lattice Boundary in Location-controlled Silicon Islands by Scanning Probe Microscopy

R. Ishihara, C. Beenakker, S. Inoue, 2007 .

P‐22: Single‐Grain Si TFTs and Circuits for Flexible Electronics and 3D‐ICs

R. Ishihara, W. Metselaar, K. Beenakker, 2007 .

34.3: 0.5 μm Fine‐Gate TFT Fabrication on 300 × 300 mm2 Glass Substrate using Holographic Microlithography

T. Shimoda, S. Higashi, S. Inoue, 2003 .

58.3: A 3.6‐In. 202‐ppi Full‐Color AMPLED Display Fabricated by Ink‐Jet Method

Yuhki Kobayashi, S. Inoue, M. Koden, 2006 .

A flexible 2.1‐in. active‐matrix electrophoretic display with high resolution and a thickness of 100 μm

T. Shimoda, M. Miyasaka, S. Inoue, 2008 .

Low temperature poly-Si TFT-electrophoretic displays (TFT-EPDs) with four level gray scale

T. Shimoda, S. Inoue, T. Ozawa, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Photoelectron yield spectroscopy and inverse photoemission spectroscopy evaluations of p-type amorphous silicon carbide films prepared using liquid materials

H. Yano, T. Masuda, T. Shimoda, 2016 .

46.1: Invited Paper: Interface — The Key to High‐Performance Poly‐Si TFT Fabrication

T. Shimoda, S. Higashi, T. Kawamura, 2003 .

Development of high-performance polycrystalline silicon thin-film transistors (TFTs) using defect control process technologies

T. Shimoda, S. Higashi, T. Kawamura, 2002, IEEE Electron Device Letters.

Low Temperature Process Technologies for the Next Generation High Performance Polycrystalline Silicon Thin-Film Transistors

T. Shimoda, S. Higashi, S. Inoue, 2001 .

Gate oxide induced switch-on undershoot current observed in thin-film transistors

R. Ishihara, P. Migliorato, V. Rana, 2005 .

Low-Temperature Formation of Device-Quality SiO2/Si Interfaces Using Electron Cyclotron Resonance Plasma-Enhanced Chemical Vapor Deposition

T. Shimoda, S. Higashi, S. Inoue, 2001 .

Time-Ratio Grayscale and Hopping Scan with Current Uniformization for Thin-Film Transistor Driven Organic Light-Emitting Diode Displays

T. Shimoda, M. Kimura, S. Inoue, 2006 .

High-relative-dielectric-constant bismuth–niobium–oxide films prepared using Nb-rich precursor solution

T. Shimoda, E. Tokumitsu, S. Inoue, 2015 .

Polycrystalline silicon ion sensitive field effect transistors

P. Estrela, P. Migliorato, T. Shimoda, 2005 .

Polymer thin film transistors with self-aligned gates fabricated using ink-jet printing

Satoshi Inoue, Shunpu Li, T. Kugler, 2007 .

High-Performance Solution-Processed ZrInZnO Thin-Film Transistors

Phan Trong Tue, S. Inoue, E. Tokumitsu, 2013, IEEE Transactions on Electron Devices.

All‐solution‐printed oxide thin‐film transistors by direct thermal nanoimprinting for use in active‐matrix arrays

T. Shimoda, S. Inoue, Daisuke Hirose, 2017 .

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology

Xu Li, Hiroshi Nakamura, Manabu Sato, 2018, 2018 IEEE International Solid - State Circuits Conference - (ISSCC).

27.2: Poly‐Si Thin‐Film Transistors Using Polysilazane‐Based Spin‐On Glass for All Dielectric Layers

T. Shimoda, S. Inoue, I. Yudasaka, 2004 .

High-resolution microencapsulated electrophoretic display (EPD) driven by poly-si TFTs with four-level grayscale

Tatsuya Shimoda, Satoshi Inoue, T. Saeki, 2002 .

P‐5: Oxide Semiconductor/Polypropylene Carbonate Paste for A Thin‐Film Transistor using Screen Printing

Masahiro Suzuki, T. Shimoda, X. Liu, 2015 .

Relaxation of phosphor field in SrS:Ce thin film electroluminescent devices

K. Ohmi, S. Inoue, Shosaku Tanaka, 1994 .

Evaluation of Thin-Film Photodiodes and Development of Thin-Film Phototransistor

Mutsumi Kimura, Inoue Satoshi, Yoshitaka Nishizaki, 2008 .

Dependence of polycrystalline silicon thin-film transistor characteristics on the grain-boundary location

Tatsuya Shimoda, Mutsumi Kimura, Satoshi Inoue, 2001 .

Polysilicon TFT on plastics

Tatsuya Shimoda, Satoshi Inoue, Sumio Utsunomiya, 2001, IS&T/SPIE Electronic Imaging.

Analysis and Classification of Degradation Phenomena in Polycrystalline-Silicon Thin Film Transistors Fabricated by a Low-Temperature Process Using Emission Light Microscopy

Tatsuya Shimoda, Mutsumi Kimura, Satoshi Inoue, 2003 .

Extraction of trap states in laser-crystallized polycrystalline-silicon thin-film transistors and analysis of degradation by self-heating

Tatsuya Shimoda, Mutsumi Kimura, Satoshi Inoue, 2002 .

Extraction of Trap States at the Oxide-Silicon Interface and Grain Boundary in Polycrystalline Silicon Thin-Film Transistors

P. Migliorato, T. Shimoda, M. Kimura, 2001 .

Hybrid cluster precursors of the LaZrO insulator for transistors: lowering the processing temperature

Jinwang Li, T. Shimoda, S. Inoue, 2018, Scientific Reports.

High-Quality SiO2/Si Interface Formation and Its Application to Fabrication of Low-Temperature-Processed Polycrystalline Si Thin-Film Transistor

T. Shimoda, S. Higashi, T. Kawamura, 2002 .

74‐2: Collimated Flux Deposition Technology for RGB SBS OLED Displays

Yuhki Kobayashi, S. Inoue, Shin’ichi Kawato, 2016 .

Device Simulation of Carrier Transport through Grain Boundaries in Lightly Doped Polysilicon Films and Dependence on Dopant Density

T. Shimoda, T. Sameshima, M. Kimura, 2001 .

Device Simulation of Grain Boundaries in Lightly Doped Polysilicon Films and Analysis of Dependence on Defect Density

T. Shimoda, T. Sameshima, M. Kimura, 2001 .

Dependence of single-crystalline Si TFT characteristics on the channel position inside a location-controlled grain

S. Inoue, R. Ishihara, V. Rana, 2005, IEEE Transactions on Electron Devices.

Analysis of threshold voltage shift caused by bias stress in low temperature poly-Si TFTs

S. Inoue, H. Ohshima, T. Shimoda, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Effects of Capping Layer on Grain Growth with µ-Czochralski Process during Excimer Laser Crystallization

Tatsuya Shimoda, Ryoichi Ishihara, Kees Beenakker, 2006 .

Analysis of Degradation Phenomenon Caused by Self-Heating in Low-Temperature-Processed Polycrystalline Silicon Thin Film Transistors

Tatsuya Shimoda, Satoshi Inoue, T. Shimoda, 2002 .

Current Paths over Grain Boundaries in Polycrystalline Silicon Films

T. Shimoda, T. Sameshima, M. Kimura, 2001 .

Extraction of Trap Densities at Front and Back Interfaces in Thin-Film Transistors

Tatsuya Shimoda, Mutsumi Kimura, Satoshi Inoue, 2004 .

High-Performance Polycrystalline Silicon Thin-Film Transistors Fabricated by High-Temperature Process with Excimer Laser Annealing

Tatsuya Shimoda, Satoshi Inoue, Hiroaki Jiroku, 2004 .

Evaluation of thin‐film photodevices and application to an artificial retina

M. Kimura, S. Inoue, H. Hara, 2008 .

A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface

Hong Ding, Manabu Sato, Takeshi Ogawa, 2012, 2012 IEEE International Solid-State Circuits Conference.

Microstructure characterization of location-controlled Si-islands crystallized by excimer laser in the μ-Czochralski (grain filter) process

J. W. Metselaar, Tatsuya Shimoda, Frans D. Tichelaar, 2007 .

Study of Degradation Phenomenon Due to a Combination of Contamination and Self-Heating in Poly-Si Thin Film Transistors Fabricated by a Low-Temperature Process

T. Shimoda, S. Inoue, S. Takenaka, 2003 .