L. Nyns

Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

C. Merckling, N. Waldron, N. Collaert, 2016, 2016 IEEE Symposium on VLSI Technology.

Co Active Electrode Enhances CBRAM Performance and Scaling Potential

R. Delhougne, L. Goux, S. Kundu, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

S. De Gendt, S. Van Elshocht, A. Akheyar, 2007, 2007 IEEE International Electron Devices Meeting.

Record mobility (μeff ∼3100 cm2/V-s) and reliability performance (Vov∼0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer

R. Rooyackers, A. Vais, D. Lin, 2016, 2016 IEEE Symposium on VLSI Technology.

An InGaAs/InP quantum well finfet using the replacement fin process integrated in an RMG flow on 300mm Si substrates

C. Merckling, D. Lin, N. Waldron, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Challenges for introducing Ge and III/V devices into CMOS technologies

B. Kaczer, G. Hellings, L. Witters, 2012, 2012 IEEE International Reliability Physics Symposium (IRPS).

Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

A. Vais, C. Merckling, N. Waldron, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).