F. Doucet

Efficient System Level Co-Design Environment using Split Level Programming

Frederic Doucet, Sandeep Shukla, Rajesh K. Gupta, 2001 .

YAML: a tool for hardware design visualization and capture

Rajesh K. Gupta, S. Liao, Abhijit Ghosh, 2000, Proceedings 13th International Symposium on System Synthesis.

A methodology to take credit for high-level verification during RTL verification

R. Kurshan, F. Doucet, 2017, Formal Methods in System Design.

A methodology to take credit for high-level verification during RTL verification

Frederic Doucet, Robert Kurshan, R. Kurshan, 2017, Formal Methods Syst. Des..

Polychrony for formal refinement-checking in a system-level design methodology

Sandeep K. Shukla, Paul Le Guernic, Jean-Pierre Talpin, 2003, Third International Conference on Application of Concurrency to System Design, 2003. Proceedings..

Structural component composition for system-level models

Sandeep K. Shukla, Rajesh Gupta, Frederic Doucet, 2004 .

Interoperability as a design issue in C++ based modeling environments

Sandeep K. Shukla, Patrick Schaumont, Rajesh K. Gupta, 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

System-on-Chip Modeling Using Objects and Their Relationships

Rajesh Gupta, Frederic Doucet, Vivek Sinha, 1999 .

A Verification Approach for GALS Integration of Synchronous Components

Ingolf Krüger, Rajesh K. Gupta, Massimiliano Menarini, 2005, FMGALS@MEMOCODE.

Reactivity in SystemC Transaction-Level Models

Ingolf Krüger, Rajesh K. Gupta, R. K. Shyamasundar, 2007, Haifa Verification Conference.

BALBOA: a component-based design environment for system models

Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet, 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..