Tsung-Chu Huang

发表

Cluster error correction and on-line repair for real-time TSV array

Tsung-Chu Huang, 2015, 2015 6th Asia Symposium on Quality Electronic Design (ASQED).

A Low-Power Dependable Berger Code for Fully Asymmetric Communication

Tsung-Chu Huang, 2008, IEEE Communications Letters.

Three-Transistor DRAM-Based Content Addressable Memory Design for Reliability and Area Efficiency

Tsung-Chu Huang, Wei-Ning Hsu, Tsu-Hsin Wu, 2009, 2009 IEEE International Workshop on Memory Technology, Design, and Testing.

Built-in current sensor designs based on the bulk-driven technique

Kuen-Jong Lee, Tsung-Chu Huang, Min-Cheng Huang, 1997, Proceedings Sixth Asian Test Symposium (ATS'97).

Dependable embedded memory for intelligent systems

Tsung-Chu Huang, Yen Chieh Huang, 2013 .

A token scan architecture for low power testing

Kuen-Jong Lee, Tsung-Chu Huang, 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

Peak-power reduction for multiple-scan circuits during test application

Kuen-Jong Lee, Tsung-Chu Huang, Jih-Jeen Chen, 2000, Proceedings of the Ninth Asian Test Symposium.

Power-gating current test for static RAM in nanotechnologies

Tsung-Chu Huang, Yuan-Wei Chao, Hsin-Ling Chen, 2007, 2007 IEEE International Workshop on Memory Technology, Design and Testing.

Precompensation, BIST and Analogue Berger Codes for Self-Healing of Neuromorphic RRAM

Tsung-Chu Huang, Jeffae Schroff, 2018, 2018 IEEE 27th Asian Test Symposium (ATS).

High-yield performance-efficient redundancy analysis for 2D memory

Tsung-Chu Huang, 2011, Science China Information Sciences.

Cluster Error Correction for Real-Time Channels by Unbound Rotation of Two-Dimensional Parity-Check Codes

Tsung-Chu Huang, 2015, IEEE Communications Letters.

Program Committee

Michael S. Hsiao, Irith Pomeranz, Nur A. Touba, 2006, WOWMOM.

High-performance built-in self-routing for through-silicon vias

Tsung-Chu Huang, 2012 .

Reduction of power consumption in scan-based circuits during testapplication by an input control technique

Kuen-Jong Lee, Tsung-Chu Huang, Kuen-Jong Lee, 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A high-speed low-voltage built-in current sensor

Kuen-Jong Lee, Tsung-Chu Huang, Min-Cheng Huang, 1997, Digest of Papers IEEE International Workshop on IDDQ Testing.

Multi-valued equal-weight codes for self-checking and matching

Tsung-Chu Huang, 2009, IEEE Communications Letters.

An input control technique for power reduction in scan circuits during test application

Kuen-Jong Lee, Tsung-Chu Huang, 1999, Proceedings Eighth Asian Test Symposium (ATS'99).

An Interleaving Technique for Reducing Peak Power in Multiple-Chain Scan Circuits During Test Application

Kuen-Jong Lee, Tsung-Chu Huang, 2002, J. Electron. Test..

Combination of automatic test pattern generation and built-in intermediate voltage sensing for detecting CMOS bridging faults

Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, 1996, Proceedings of the Fifth Asian Test Symposium (ATS'96).

Congruence Synchronous Mirror Delay

Ling Li, Tsung-Chu Huang, Gau-Bin Chang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

BIFEST: a built-in intermediate fault effect sensing and test generation system for CMOS bridging faults

Kuen-Jong Lee, Jing-Jou Tang, Tsung-Chu Huang, 1999, TODE.

A low-power LFSR architecture

Kuen-Jong Lee, Tsung-Chu Huang, 2001, Proceedings 10th Asian Test Symposium.

Token scan cell for low power testing

Kuen-Jong Lee, Tsung-Chu Huang, 2001 .

HYPERA: High-Yield Performance-Efficient Redundancy Analysis

Tsung-Chu Huang, Yen-Chieh Huang, Kuei-Yeh Lu, 2010, 2010 19th IEEE Asian Test Symposium.

A Supply-Gating Scheme for Both Data-Retention and Spike-Reduction in Power Management and Test Scheduling

Kuen-Jong Lee, Ji-Jan Chen, Wei-Ting Liu, 2006, 2006 International Symposium on VLSI Design, Automation and Test.

SAFER & SAFEST: Single-Aging-Factor Enhanced Rings and Shadow Trees for Data Annotation and Early Warning in Online Aging Monitors of Automotive SoCs

Tsung-Chu Huang, Cho-Sheng Lin, Jing Huang, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

TCBNN: Error-Correctable Ternary-Coded Binarized Neural Network

Tsung-Chu Huang, Cheng-Di Tsai, Ting-Yu Chen, 2021, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS).

AN-Coded Redundant Residue Number System for Reliable Neural Networks

Tsung-Chu Huang, Ting-Yu Chen, Hsiao-Wen Fu, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).

Error Correctable Range-Addressable Lookup for Activation and Quantization in AI Automotive Electronics

Tsung-Chu Huang, Ting-Yu Chen, Hsiao-Wen Fu, 2021, 2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW).