Bah-Hwee Gwee

发表

A power-efficient integrated input/output completion detection circuit for asynchronous-logic quasi-delay-insensitive Pre-Charged Half-Buffer

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2011, 2011 International Symposium on Integrated Circuits.

Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supply-Voltage-Scaling for Multicore Cryptographic Applications

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2020, ISCAS.

A Comparative Analysis of 65nm CMOS SRAM and Commercial SRAMs in Security Vulnerability Evaluation

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2018, 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP).

A micropower low-distortion digital pulsewidth modulator for a digital class D amplifier

Bah-Hwee Gwee, J. S. Chang, Huiyun Li, 2002 .

Synchronous-Logic and Globally-Asynchronous-Locally-Synchronous (GALS) Acoustic Digital Signal Processors

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2012, IEEE Journal of Solid-State Circuits.

Asynchronous Control Network Optimization Using Fast Minimum-Cycle-Time Analysis

Bah-Hwee Gwee, Joseph Sylvester Chang, Chong-Fatt Law, 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A micropower low-voltage multiplier with reduced spurious switching

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A novel combined first and second order Lagrange interpolation sampling process for a digital class D amplifier

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Quasi-delay-insensitive compiler: Automatic synthesis of asynchronous circuits from verilog specifications

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, 2011, 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS).

An investigation on the parameters affecting total harmonic distortion in class D amplifiers

Bah-Hwee Gwee, Meng Tong Tan, Joseph Sylvester Chang, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Energy-delay efficient asynchronous-logic 16×16-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A Randomized Modulation scheme for filterless digital Class D audio amplifiers

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A High Throughput and Secure Authentication-Encryption AES-CCM Algorithm on Asynchronous Multicore Processor

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2019, IEEE Transactions on Information Forensics and Security.

A low-voltage micropower asynchronous multiplier for a multiplierless FIR filter

Bah-Hwee Gwee, Joseph Sylvester Chang, Chien-Chung Chua, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A robust asynchronous approach for realizing ultra-low power digital Self-Adaptive VDD Scaling system

Wei Shu, Kwen-Siong Chong, Bah-Hwee Gwee, 2012, 2012 IEEE Subthreshold Microelectronics Conference (SubVT).

An acoustic noise suppression system with reduced musical artifacts

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Ultra-Low Power Read-Decoupled SRAMs with Ultra-Low Write-Bitline Voltage Swing

Kwen-Siong Chong, Bah-Hwee Gwee, Junchao Chen, 2014, Circuits Syst. Signal Process..

A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiers

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Asynchronous-Logic QDI Quad-Rail Sense-Amplifier Half-Buffer Approach for NoC Router Design

Kwen-Siong Chong, Kyaw Zwa Lwin Ne, Bah-Hwee Gwee, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

De-synchronization of a point-of-sales digital-logic controller

Bah-Hwee Gwee, Kok-Leong Chang, Yao Zhu, 2008, 2008 IEEE International Symposium on Circuits and Systems.

Highly secured state-shift local clock circuit to countermeasure against side channel attack

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Design of several asynchronous-logic macrocells for a low-voltage micropower cell library

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2007, IET Circuits Devices Syst..

A low-power dual-rail inputs write method for bit-interleaved memory cells

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

A Highly Efficient Power Model for Correlation Power Analysis (CPA) of Pipelined Advanced Encryption Standard (AES)

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2020, ISCAS.

Synthesis of asynchronous QDI circuits using synchronous coding specifications

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A digital Class D amplifier design embodying a novel sampling process and pulse generator

Bah-Hwee Gwee, Joseph Sylvester Chang, Huiyun Li, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A Low Energy FFT/IFFT Processor for Hearing Aids

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Extracting functional modules from flattened gate-level netlist

Bah-Hwee Gwee, Ye Ren, Yiqiong Shi, 2012, 2012 International Symposium on Communications and Information Technologies (ISCIT).

An Ultra-Low Power Asynchronous-Logic In-Situ Self-Adaptive $V_{\rm DD}$ System for Wireless Sensor Networks

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2013, IEEE Journal of Solid-State Circuits.

Low-voltage asynchronous adders for low power and high speed applications

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Highly secured arithmetic hiding based S-Box on AES-128 implementation

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2016, 2016 International Symposium on Integrated Circuits (ISIC).

Success rate model for fully AES-128 in correlation power analysis

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2016, 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Fine-grained power gating for leakage and short-circuit power reduction by using asynchronous-logic

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2009, 2009 IEEE International Symposium on Circuits and Systems.

DPA-resistant QDI dual-rail AES S-Box based on power-balanced weak-conditioned half-buffer

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A 32-point FFT based Noise Reduction Algorithm for Single Channel Speech Signals

Bah-Hwee Gwee, Kunal Mukherjee, 2007, 2007 IEEE International Symposium on Circuits and Systems.

A robust low voltage low energy asynchronous carry-completion sensing adder for biomedical applications

Kwen-Siong Chong, Bah-Hwee Gwee, J.S. Chang, 2004, IEEE International Workshop on Biomedical Circuits and Systems, 2004..

A low-harmonics low-noise randomized modulation scheme for multi-phase DC-DC converters

Bah-Hwee Gwee, Joseph Sylvester Chang, Yin Sun, 2017, 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS).

A self-oscillating class D audio amplifier with dual voltage and current feedback

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

A Simple Methodology of Designing Asynchronous Circuits Using Commercial IC Design Tools and Standard Library Cells

Kwen-Siong Chong, Bah-Hwee Gwee, J.S. Chang, 2007, 2007 International Symposium on Integrated Circuits.

A Hybrid Genetic Hill-climbing Algorithm for Four-Coloring Map Problems

Bah-Hwee Gwee, Joseph Sylvester Chang, 2003, HIS.

Area-efficient and low stand-by power 1k-byte transmission-gate-based non-imprinting high-speed erase (TNIHE) SRAM

Kwen-Siong Chong, Kyaw Zwa Lwin Ne, Bah-Hwee Gwee, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

An efficient VLSI circuit extraction algorithm for transistor-level to gate-level abstraction

Bah-Hwee Gwee, Ye Ren, Yiqiong Shi, 2010, 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

A Secure Data-Toggling SRAM for Confidential Data Protection

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Solving four-colouring map problem using genetic algorithm

Bah-Hwee Gwee, Meng-Hiot Lim, Jiun-Sien Ho, 1993, Proceedings 1993 The First New Zealand International Two-Stream Conference on Artificial Neural Networks and Expert Systems.

Low delay-variation sub-/near-threshold asynchronous-to-synchronous interface controller for GALS Network-on-Chips

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2014, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Novel real-time system design for floating-point sub-Nyquist multi-coset signal blind reconstruction

Bah-Hwee Gwee, Zhiping Lin, Sirajudeen Gulam Razul, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Fast and memory-efficient invariant computation of ordinary Petri nets

Bah-Hwee Gwee, Joseph Sylvester Chang, Chong-Fatt Law, 2007, IET Comput. Digit. Tech..

A GA with heuristic-based decoder for IC floorplanning

Bah-Hwee Gwee, Meng-Hiot Lim, M. Lim, 1999, Integr..

Self-adjusting diagnostic system for the manufacture of crystal resonators

Bah-Hwee Gwee, B. H. Soong, Mi Hee Lim, 1993, Conference Record of the 1993 IEEE Industry Applications Conference Twenty-Eighth IAS Annual Meeting.

Modeling and Synthesis of Asynchronous Pipelines

Bah-Hwee Gwee, Joseph S. Chang, Chong-Fatt Law, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Micropower low voltage digital signal processors based on asynchronous logic.

Bah-Hwee Gwee, Joseph S. Chang, 1999 .

Reconfigurable Routing Paths As Noise Generators Using NoC Platform for Hardware Security Applications

Ali Akbar Pammu, Kwen-Siong Chong, Kyaw Zwa Lwin Ne, 2019, 2019 32nd IEEE International System-on-Chip Conference (SOCC).

A performance comparison on asynchronous matched-delay templates

Bah-Hwee Gwee, Yuanjin Zheng, Kok-Leong Chang, 2009, 2009 IEEE International Symposium on Circuits and Systems.

An Ultra-Dynamic Voltage Scalable (U-DVS) 10T SRAM with bit-interleaving capability

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2012, 2012 IEEE International Symposium on Circuits and Systems.

Asynchronous circuits for dynamic voltage scaling

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2019 .

A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

Synthesis of Asynchronous Circuits from Verilog Specifications

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, 2011 .

A single-VDD half-clock-tolerant fine-grained dynamic voltage scaling pipeline

Kwen-Siong Chong, Bah-Hwee Gwee, Rong Zhou, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Synchronous-Logic and Asynchronous-Logic 8051 Microcontroller Cores for Realizing the Internet of Things: A Comparative Study on Dynamic Voltage Scaling and Variation Effects

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2013, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Design of an output stage for high switching frequency DC-DC converters

Bah-Hwee Gwee, Joseph Sylvester Chang, Yin Sun, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Security analysis of asynchronous-logic QDI cell approach for differential power analysis attack

Ali Akbar Pammu, Kwen-Siong Chong, Kyaw Zwa Lwin Ne, 2016, 2016 International Symposium on Integrated Circuits (ISIC).

Low-voltage micropower multipliers with reduced spurious switching

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Asynchronous DSP for low-power energy-efficient embedded systems

Bah-Hwee Gwee, Joseph Sylvester Chang, Yiqiong Shi, 2011, Microprocess. Microsystems.

A 16-Channel Low-Power Nonuniform Spaced Filter Bank Core for Digital Hearing Aids

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

High robustness energy- and area-efficient dynamic-voltage-scaling 4-phase 4-rail asynchronous-logic Network-on-Chip (ANoC)

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

Low normalized energy derivation asynchronous circuit synthesis flow through fork-join slack matching for cryptographic applications

Kwen-Siong Chong, Bah-Hwee Gwee, Nan Liu, 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A semi-custom memory design for an asynchronous 8051 microcontroller

Bah-Hwee Gwee, Yuanjin Zheng, Kok-Leong Chang, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A novel low-power low-voltage Class D amplifier with feedback for improving THD, power efficiency and gain linearity

Bah-Hwee Gwee, Meng Tong Tan, Joseph Sylvester Chang, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

A Secure Data-Toggling SRAM for Confidential Data Protection

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2020, ISCAS.

Low Power Asynchronous Circuit Design: An FFT/IFFT Processor

Kwen-Siong Chong, Bah-Hwee Gwee, 2010 .

Low power sub-threshold asynchronous QDI Static Logic Transistor-level Implementation (SLTI) 32-bit ALU

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Low Gate-Count Ultra-Small Area Nano Advanced Encryption Standard (AES) Design

Wei Shu, Kwen-Siong Chong, Bah-Hwee Gwee, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

A ReviewofDesign Methods forDigital Modulators

Bah-Hwee Gwee, Victor Adrian, 2007 .

Analytical delay variation modeling for evaluating sub-threshold synchronous/asynchronous designs

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

Side-Channel-Attack Resistant Dual-Rail Asynchronous-Logic AES Accelerator Based on Standard Library Cells

Kwen-Siong Chong, Bah-Hwee Gwee, Chao Wang, 2019, 2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).

A Highly-Secured Arithmetic Hiding cum Look-Up Table (AHLUT) based S-Box for AES-128 Implementation

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2017 .

Interceptive side channel attack on AES-128 wireless communications for IoT applications

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2016, 2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014, Ishigaki, Japan, November 17-20, 2014

Kong-Pang Pun, Kwen-Siong Chong, Bah-Hwee Gwee, 2014, APCCAS.

Deep Learning for Automatic IC Image Analysis

Bah-Hwee Gwee, Tong Lin, Yiqiong Shi, 2018, 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP).

A low power 16-bit Booth Leapfrog array multiplier using Dynamic Adders

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Secured Low Power Overhead Compensator Look-Up-Table (LUT) Substitution Box (S-Box) Architecture

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2016, 2016 IEEE International Conference on Networking, Architecture and Storage (NAS).

Energy-Efficient Synchronous-Logic and Asynchronous-Logic FFT/IFFT Processors

Kwen-Siong Chong, Bah-Hwee Gwee, J.S. Chang, 2007, IEEE Journal of Solid-State Circuits.

Designing globally-asynchronous-locally-system from multi-rate Simulink model

Bah-Hwee Gwee, Yiqiong Shi, 2013, 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS).

Optimized Algorithm for Computing Invariants of Ordinary Petri Nets

Bah-Hwee Gwee, Joseph Sylvester Chang, Chong-Fatt Law, 2006, 5th IEEE/ACIS International Conference on Computer and Information Science and 1st IEEE/ACIS International Workshop on Component-Based Software Engineering,Software Architecture and Reuse (ICIS-COMSAR'06).

A highly efficient method for extracting FSMs from flattened gate-level netlist

Bah-Hwee Gwee, Ye Ren, Yiqiong Shi, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A Low Voltage Micropower 16-Word by 16-Bit 3-Port Asynchronous Register File

Bah-Hwee Gwee, Joseph Sylvester Chang, Khia-Ho Chang, 2003, VLSI.

A Highly Efficient Side Channel Attack with Profiling through Relevance-Learning on Physical Leakage Information

Ali Akbar Pammu, Kwen-Siong Chong, Bah-Hwee Gwee, 2019, IEEE Transactions on Dependable and Secure Computing.

An evolution search algorithm for solving N-queen problems

Bah-Hwee Gwee, Meng-Hiot Lim, M. Lim, 2005, Int. J. Comput. Appl. Technol..

Low-voltage micropower asynchronous multiplier for hearing instruments

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits

Kwen-Siong Chong, Kyaw Zwa Lwin Ne, Bah-Hwee Gwee, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

An ultra-low power asynchronous quasi-delay-insensitive (QDI) sub-threshold memory with bit-interleaving and completion detection

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, 2010, Proceedings of the 8th IEEE International NEWCAS Conference 2010.

A Noise-Shaped Randomized Modulation for Switched-Mode DC-DC Converters

Bah-Hwee Gwee, Joseph S. Chang, Victor Adrian, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Global Template Projection and Matching Method for Training-Free Analysis of Delayered IC Images

Bah-Hwee Gwee, Kar-Ann Toh, Tong Lin, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

A class-E RF power amplifier with a novel matching network for high-efficiency dynamic load modulation

Bah-Hwee Gwee, Joseph Sylvester Chang, Qianqian Liu, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Sense Amplifier Half-Buffer (SAHB) A Low-Power High-Performance Asynchronous Logic QDI Cell Template

Bah-Hwee Gwee, Weng-Geng Ho, Joseph S. Chang, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A comparative study on asynchronous Quasi-Delay-Insensitive templates

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2012, 2012 IEEE International Symposium on Circuits and Systems.

A micropower low-distortion digital class-D amplifier based on an algorithmic pulsewidth modulator

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.

Counteracting differential power analysis: Hiding encrypted data from circuit cells

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2015, 2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).

A Review of Design Methods for Digital Modulators

Bah-Hwee Gwee, J.S. Chang, V. Adrian, 2007, 2007 International Symposium on Integrated Circuits.

A dynamic-voltage-scaling 1kbyte×8-bit non-imprinting Master-Slave SRAM with high speed erase for low-power operation

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2014, 2014 International Symposium on Integrated Circuits (ISIC).

Low power sub-threshold asynchronous quasi-delay-insensitive 32-bit arithmetic and logic unit based on autonomous signal-validity half-buffer

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2015, IET Circuits Devices Syst..

A Hierarchical Multiclassifier System for Automated Analysis of Delayered IC Images

Bah-Hwee Gwee, Kar-Ann Toh, Tong Lin, 2019, IEEE Intelligent Systems.

A high-efficiency Class-E polar power-amplifier with a novel digitally-controlled output matching network

Bah-Hwee Gwee, Joseph Sylvester Chang, Qianqian Liu, 2016, 2016 International Symposium on Integrated Circuits (ISIC).

A low-energy low-voltage asynchronous 8051 microcontroller core

Bah-Hwee Gwee, Kok-Leong Chang, 2006, 2006 IEEE International Symposium on Circuits and Systems.

An Asynchronous Dual-Rail Multiplier based on Energy-Efficient STFB Templates

Bah-Hwee Gwee, Yuanjin Zheng, Kok-Leong Chang, 2007, 2007 IEEE International Symposium on Circuits and Systems.

An investigation into the parameters affecting total harmonic distortion in low-voltage low-power Class-D amplifiers

Bah-Hwee Gwee, Meng Tong Tan, J. S. Chang, 2003 .

Hybrid ${K}$ -Means Clustering and Support Vector Machine Method for via and Metal Line Detections in Delayered IC Images

Bah-Hwee Gwee, Kar-Ann Toh, Tong Lin, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

A dual-core 8051 microcontroller system based on synchronous-logic and asynchronous-logic

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A Low Overhead Quasi-Delay-Insensitive (QDI) Asynchronous Data Path Synthesis Based on Microcell-Interleaving Genetic Algorithm (MIGA)

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2014, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Low energy 16-bit Booth leapfrog array multiplier using dynamic adders

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2007, IET Circuits Devices Syst..

A Low-Voltage Micropower Asynchronous Multiplier With Shift–Add Multiplication Approach

Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Randomized Wrapped-Around Pulse Position Modulation Scheme for DC–DC Converters

Bah-Hwee Gwee, Joseph Sylvester Chang, Victor Adrian, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

Joint Anomaly Detection and Inpainting for Microscopy Images Via Deep Self-Supervised Learning

Bah-Hwee Gwee, Xulei Yang, Bihan Wen, 2021, 2021 IEEE International Conference on Image Processing (ICIP).

Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2021, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

Normalized Differential Power Analysis - for Ghost Peaks Mitigation

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A Power-Aware Toggling-Frequency Actuator in Data-Toggling SRAM for Secure Data Protection

Kwen-Siong Chong, Bah-Hwee Gwee, Weng-Geng Ho, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

A Novel Normalized Variance-Based Differential Power Analysis Against Masking Countermeasures

Kwen-Siong Chong, Bah-Hwee Gwee, Jun-Sheng Ng, 2021, IEEE Transactions on Information Forensics and Security.

A novel pulse width modulation sampling process for low power, low distortion digital Class D amplifiers

Bah-Hwee Gwee, Meng Tong Tan, Huiyan Li, 2000, Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144).

DESIGN AND IMPLEMENTATION OF A LOW POWER FIR FILTER BANK

Bah-Hwee Gwee, Ricky Setiawan, Victor Putra Lesmana, 2005 .