D. Bhatia

发表

Remote Blood Pressure Monitoring Using a Wireless Sensor Network

A. Hande, W. Walker, T. Polk, 2006 .

W. Walker, D. Bhatia, A. L. P. Aroul, 2008 .

Placement and routing for 3D-FPGAs using reinforcement learning and support vector machines

V. Kamakoti, R. Manimegalai, Balaraman Ravindran, 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

VLSI Design and ASPDAC Technical Program Committee

Dinesh Bhatia, Rajiv V. Joshi, Daniel D. Gajski, 2002 .

Compressive properties of Min-mod-type limiters in modelling shockwave-containing flows

Guangning Li, Jian Wang, D. Bhatia, 2020, Journal of the Brazilian Society of Mechanical Sciences and Engineering.

Rapid routability estimation for FPGAs

Dinesh Bhatia, Shankar Balachandran, Parivallal Kannan, 2002 .

Rapid and Reliable Routability Estimation for FPGAs

Dinesh Bhatia, Shankar Balachandran, PariVallal Kannan, 2002, FPL.

Efficient reconfiguration of WSI arrays (extended abstract)

Dinesh Bhatia, Fillia Makedon, Tom Leighton, 1990 .

Reconfigurable computing

D. Bhatia, D. Bhatia, 1997, Proceedings Tenth International Conference on VLSI Design.

Memory Optimization Techniques for FPGA based CNN Implementations

Dinesh Bhatia, Pingakshya Goswami, Masoud Shahshahani, 2018, 2018 IEEE 13th Dallas Circuits and Systems Conference (DCAS).

Improved Algorithms for Routing on Two-Dimensional Grids

Dinesh Bhatia, Fillia Makedon, Frank Thomson Leighton, 1992, WG.

Minimum Phase Wide Output Range Digitally Controlled SIDO Boost Converter

Poras T. Balsara, Dinesh K. Bhatia, Sujan K. Manohar, 2015, IEEE Transactions on Circuits and Systems I: Regular Papers.

Indoor solar energy harvesting for sensor network router nodes

Abhiman Hande, Dinesh K. Bhatia, Todd Polk, 2007, Microprocess. Microsystems.

Energy harvesting for active RF sensors and ID tags

Abhiman Hande, Raj Bridgelall, Dinesh Bhatia, 2009 .

A Fault Tolerant Technique for FPGAs

Dinesh K. Bhatia, John M. Emmert, D. Bhatia, 2000, J. Electron. Test..

A Study on Basal Ganglia Circuit and Its Relation With Movement Disorders

D. Bhatia, 2020 .

Mobile health monitoring systems

William Walker, Dinesh Bhatia, A. L. Praveen Aroul, 2009, 2009 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

Temporal Partitioning and Scheduling Data Flow Graphs for Reconfigurable Computers

Dinesh Bhatia, Karthikeya M. Gajjala Purna, D. Bhatia, 1999, IEEE Trans. Computers.

Partitioning in time: a paradigm for reconfigurable computing

Dinesh Bhatia, Karthikeya M. Gajjala Purna, D. Bhatia, 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

Emulating large designs on small reconfigurable hardware

Dinesh Bhatia, Karthikeya M. Gajjala Purna, D. Bhatia, 1998, Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237).

Temporal partitioning and scheduling for reconfigurable computing

Dinesh Bhatia, Karthikeya M. Gajjala Purna, D. Bhatia, 1998, Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251).

A constructive method for data path area estimation during high-level VLSI synthesis

Dinesh Bhatia, Ranga Vemuri, Anurag Gupta, 1997, Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference.

Input–Output Linearization of a Boost Converter With Mixed Load (Constant Voltage Load and Constant Power Load)

Dinesh Bhatia, Poras Balsara, Sameer Arora, 2019, IEEE Transactions on Power Electronics.

Effect of sampling time and sampling instant on the frequency response of a boost converter

Poras T. Balsara, Dinesh K. Bhatia, Sameer Arora, 2016, IECON 2016 - 42nd Annual Conference of the IEEE Industrial Electronics Society.

Amalgamation of Blockchain Technology and Internet of Things for Healthcare Applications

M. Mukherjee, D. Bhatia, A. Mishra, 2021 .

Clustering to improve bi-partition quality and run time

Dinesh Bhatia, Gregory Tumbush, D. Bhatia, 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

Network interface for NoC based architectures

Dinesh Bhatia, Poras T. Balsara, S. P. Singh, 2007 .

Pacemakers charging using body energy

Dinesh Bhatia, Manoj Jangra, D. Bhatia, 2010, Journal of pharmacy & bioallied sciences.

Estimating pre-placement FPGA interconnection requirements

Dinesh Bhatia, PariVallal Kannan, D. Bhatia, 2004, 17th International Conference on VLSI Design. Proceedings..

FPGA based EBCOT architecture for JPEG 2000

Dinesh Bhatia, Manjunath Gangadhar, D. Bhatia, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Microchannels for thermal management in FPGAs

Girish Deshpande, Dinesh K. Bhatia, D. Bhatia, 2017, 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

NEBULA: A Partially and Dynamically Reconfigurable Architecture

Dinesh Bhatia, PariVallal Kannan, Kuldeep S. Simha, 1999, FPL.

RACE: Reconfigurable and Adaptive Computing Environment

Dinesh Bhatia, Doug Smith, D. Bhatia, 1996, FPL.

Pseudoexhaustive BIST for sequential circuits

Dinesh Bhatia, Spyros Tragoudas, Dimitrios Kagaris, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

On routing demand and congestion estimation for FPGAs

Dinesh Bhatia, Shankar Balachandran, PariVallal Kannan, 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

Exploring logic block granularity in leakage tolerant FPGA

Dinesh Bhatia, Poras T. Balsara, Rajarshee P. Bharadwaj, 2006, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06).

FPGA architecture for standby power management

Dinesh Bhatia, Poras T. Balsara, Rajarshee P. Bharadwaj, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

A priori wirelength and interconnect estimation based on circuit characteristic

Dinesh Bhatia, Shankar Balachandran, D. Bhatia, 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A priori wirelength and interconnect estimation based on circuit characteristics

Dinesh Bhatia, Shankar Balachandran, D. Bhatia, 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Tightly Integrated Placement and Routing for FPGAs

Dinesh Bhatia, PariVallal Kannan, D. Bhatia, 2001, FPL.

Piezoelectric Generators for Vibrational Energy Harvesting August 24 , 2013

D. Bhatia, 2013 .

Grid Convergence Analysis for MUSCL-based Numerical Scheme in Shockwave-containing Flows

Dinesh Bhatia, Min Xu, Jian Wang, 2019, MATEC Web of Conferences.

Self-Powered Wireless Sensor Networks for Remote Patient Monitoring in Hospitals

Abhiman Hande, Todd Polk, William Walker, 2006 .

Portable impedance measurement device for sweat based glucose detection

Dinesh Bhatia, Poras T. Balsara, Athul Asokan Thulasi, 2017, 2017 IEEE 14th International Conference on Wearable and Implantable Body Sensor Networks (BSN).