J. Portal

Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations

E. Vianello, F. Andrieu, B. Giraud, 2022, ArXiv.

OxRAM + OTS optimization for binarized neural network hardware implementation

G. Molas, E. Vianello, C. Carabasse, 2021, Semiconductor Science and Technology.

High-Density 3D Monolithically Integrated Multiple 1T1R Multi-Level-Cell for Neural Networks

C. Cagli, G. Molas, E. Vianello, 2020, International Electron Devices Meeting.

1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing

G. Molas, E. Vianello, C. Carabasse, 2022, 2022 IEEE International Memory Workshop (IMW).