Weng Fook Lee

发表

Implementation of 128/256 Bit Data Bus Microprocessor Core on FPGA

Weng Fook Lee, Ali Yeon, 2007 .

A novel large-bit-size architecture and microarchitecture for the implementation of Superscalar Pipeline VLIW microprocessors

Weng Fook Lee, 2008 .

Coding Style: Best‐Known Method for Synthesis

Weng Fook Lee, 2005 .

VLIW microprocessor hardware design : for ASIC and FPGA

Weng Fook Lee, 2008 .

Verilog Coding for Logic Synthesis: Lee/Verilog Coding

Weng Fook Lee, 2005 .

RTL Coding Guideline

Weng Fook Lee, 2019 .

Learning from VLSI Design Experience

Weng Fook Lee, 2018 .

A method for doppelbitspeicherlöschprüfung

Weng Fook Lee, Pau-Ling Chen, Darlene Hamilton, 2001 .

Verilog Coding for Logic Synthesis

Weng Fook Lee, 2003 .

Design Methodology and Flow

Weng Fook Lee, 2019 .

Design Example of Programmable Logic Block for Peripheral Interface

Weng Fook Lee, 2005 .

Design for Test

Weng Fook Lee, 2019 .

Design Example of Programmable Timer

Weng Fook Lee, 2005 .

Method and apparatus for Softprogrammverfikation in a memory module

Weng Fook Lee, Edward V. Bautista, Santosh K. Yachareni, 2002 .

Case Studies on Transition Fault Test Generation for At-speed Scan Testing

Xiaoqing Wen, Weng Fook Lee, Nor Azura Zakaria, 2010, 2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems.

Implementation Results on Register Bypass Conditions of an n-Parallel Pipes Superscalar Pipeline Microprocessor Core on FPGA

Nor Hisham Hamid, Weng Fook Lee, Azrul Halim, 2007 .

Implementing a Large Data Bus VLIW Microprocessor

Weng Fook Lee, Ali Yeon Md Shakaff, A. Shakaff, 2008 .

VHDL Coding and Logic Synthesis with Synopsys

Weng Fook Lee, 2000 .

Multiple Clock Design

Weng Fook Lee, 2019 .

System and method for controlling an erase voltage during erasure of a plurality of sectors of a flash memory

Weng Fook Lee, Edward V Bautista, Ken Cheong Cheah, 2003 .