C. Y. Kang

Reliability Characteristics of La-doped High-k/Metal Gate nMOSFETs

Byoung Hun Lee, Raj Jammy, Rino Choi, 2009 .

Comprehensive layout and process optimization study of Si and III-V technology for sub-7nm node

T. Michalak, G. Bersuker, P. D. Kirsch, 2013, 2013 IEEE International Electron Devices Meeting.

High Mobility SiGe Channel pMOSFETs Epitaxially Grown on Si (100) Substrates with HfSiO 2 High-k Dielectric and Metal Gate

Raj Jammy, Takuya Sugawara, Prashant Majhi, 2008 .

Bulk and Interface effects on voltage linearity of ZrO2–SiO2 multilayered metal-insulator-metal capacitors for analog mixed-signal applications

Raj Jammy, Geun Young Yeom, Chong-Yun Park, 2009 .

Conformal, low-damage shallow junction technology (Xj∼5nm) with optimized contacts for FinFETs as a Solution Beyond 14nm Node

R. Jammy, J. Snow, P. D. Kirsch, 2012, 2012 12th International Workshop on Junction Technology.

Stress field analysis to understand the breakdown characteristics of stacked high-k dielectrics

Byoung Hun Lee, Gennadi Bersuker, Rino Choi, 2009 .