P. Corsonello

发表

A New Reconfigurable Coarse-Grain Architecture for Multimedia Applications

Martin Margala, Marco Lanuzza, Stefania Perri, 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).

Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology

Massimo Alioto, Pasquale Corsonello, Fabio Frustaci, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Design and demonstration of high throughput square rooting circuit

Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, 1996 .

A sub‐1 V nanopower temperature‐compensated sub‐threshold CMOS voltage reference with 0.065%/V line sensitivity

Giuseppe Iannaccone, Pasquale Corsonello, Felice Crupi, 2015, Int. J. Circuit Theory Appl..

V Temperature-Compensated Subthreshold CMOS Voltage Reference

G. Iannaccone, F. Crupi, C. Pace, 2011 .

Design and demonstration of a real time processor for one-bit coded SAR signals

Gilda Schirinzi, Pasquale Corsonello, Gregorio Cappuccino, 1996 .

Exploring well configurations for voltage level converter design in 28 nm UTBB FDSOI technology

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

Variable precision arithmetic circuits for FPGA-based multimedia processors

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Area-Delay Efficient Binary Adders in QCA

Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

ESTIMATION OF POWER DISSIPATION FOR TRANSMISSION LINES IN DEEP-SUBMICROMETER ULSI CIRCUITS

Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, 1999 .

Comparative Evaluation of Background Subtraction Algorithms for High Performance Embedded Systems

G. Cocorullo, Lorena Guachi, S. Perri, 2017 .

Color Invariant Study for Background Subtraction

G. Cocorullo, Lorena Guachi, S. Perri, 2016 .

Simulation of electronic measurement transformers

P. Daponte, P Corsonello, P. Daponte, 1990 .

Editorial

Wendi B. Heinzelman, Andrew T. Campbell, Mehran Mozaffari Kermani, 2017, Formal Aspects of Computing.

Editorial

Mehran Mozaffari Kermani, Chip-Hong Chang, P. Pande, 2022, Cancer Genetics.

A novel background subtraction method based on color invariants and grayscale levels

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2014, 2014 International Carnahan Conference on Security Technology (ICCST).

Design of a Low-Power Super-Resolution Architecture for Virtual Reality Wearable Devices

S. Perri, P. Corsonello, F. Frustaci, 2023, IEEE Sensors Journal.

Parallel architecture of power-of-two multipliers for FPGAs

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, IET Circuits Devices Syst..

An embedded machine vision system for an in-line quality check of assembly processes

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, Procedia Manufacturing.

Multimodal background subtraction for high-performance embedded systems

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2019, Journal of Real-Time Image Processing.

A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference

Giuseppe Iannaccone, Pasquale Corsonello, Felice Crupi, 2011, IEEE Journal of Solid-State Circuits.

Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes

G. Cocorullo, S. Perri, P. Corsonello, 2022, Sensors.

Welding defects classification through a Convolutional Neural Network

S. Perri, P. Corsonello, F. Frustaci, 2023, Manufacturing Letters.

Fast and energy-efficient Manchester carry-bypass adders

Stefania Perri, Pasquale Corsonello, Vitit Kantabutra, 2004 .

Editorial

Mark Mohammad Tehranipoor, Meng-Fan Chang, Rajiv V. Joshi, 2017, Formal Aspects of Computing.

Design of a real-time face detection architecture for heterogeneous systems-on-chips

Stefania Perri, Pasquale Corsonello, Fanny Spagnolo, 2020, Integr..

Compressed Sensing Approach for Physiological Signals: A Review

R. Gravina, P. Corsonello, F. Spagnolo, 2023, IEEE Sensors Journal.

High performance VLSI modules for division and square root

Pasquale Corsonello, Gregorio Cappuccino, Giuseppe Cocorullo, 1998, Microprocess. Microsystems.

Designing Energy-Efficient Approximate Multipliers

S. Perri, P. Corsonello, F. Frustaci, 2022, Journal of Low Power Electronics and Applications.

Table of Contents.

R. Kapur, M. Margala, M. Lanuzza, 2016, Nihon Ronen Igakkai zasshi. Japanese journal of geriatrics.

An efficient and optimized FPGA Feedback M-PSK Symbol Timing Recovery Architecture based on the Gardner Timing Error Detector

Stefania Perri, Pasquale Corsonello, Paolo Zicari, 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

Radial-Shaped Single Varactor-Tuned Phasing Line for Active Reflectarrays

Antonio Raffo, Pasquale Corsonello, Francesca Venneri, 2016, IEEE Transactions on Antennas and Propagation.

An Efficient Connected Component Labeling Architecture for Embedded Systems

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2018 .

Beam-Scanning Reflectarray Based on a Single Varactor-Tuned Element

A. Borgia, Pasquale Corsonello, Sandra Costanzo, 2012 .

Design of a reconfigurable reflectarray based on a varactor tuned element

S. Costanzo, G. Di Massa, A. Borgia, 2012, 2012 6th European Conference on Antennas and Propagation (EUCAP).

Design of Approximate Bilateral Filters for Image Denoising on FPGAs

S. Perri, P. Corsonello, F. Frustaci, 2023, IEEE Access.

Fast and Wide Range Voltage Conversion in Multisupply Voltage Designs

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Low-Power Level Shifter for Multi-Supply Voltage Designs

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2012, IEEE Transactions on Circuits and Systems II: Express Briefs.

Gate‐level body biasing technique for high‐speed sub‐threshold CMOS logic gates

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2014, Int. J. Circuit Theory Appl..

High-performance noise-tolerant circuit techniques for CMOS dynamic logic

P. Corsonello, G. Cocorullo, F. Frustaci, 2008, IET Circuits Devices Syst..

Approximate Multipliers With Dynamic Truncation for Energy Reduction via Graceful Quality Degradation

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Reconfigurable Convolution Architecture for Heterogeneous Systems-on-Chip

Stefania Perri, Pasquale Corsonello, Fabio Frustaci, 2020, 2020 9th Mediterranean Conference on Embedded Computing (MECO).

Low-power split-path data-driven dynamic logic

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2009, IET Circuits Devices Syst..

A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers

S. Perri, P. Corsonello, F. Frustaci, 2023, IEEE Transactions on Circuits and Systems II: Express Briefs.

A new low-power high-speed single-clock-cycle binary comparator

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Impact of Process Variations on Flip-Flops Energy and Timing Characteristics

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Designing High-Speed Adders in Power-Constrained Environments

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.

VLSI circuits for low-power high-speed asynchronous addition

Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, 2002, IEEE Trans. Very Large Scale Integr. Syst..

An explainable embedded neural system for on-board ship detection from optical satellite imagery

F. Morabito, C. Ieracitano, N. Mammone, 2024, Engineering Applications of Artificial Intelligence.

Approximate bilateral filters for real-time and low-energy imaging applications on FPGAs

S. Perri, P. Corsonello, F. Frustaci, 2024, The Journal of Supercomputing.

Design and Implementation of a 90nm Low bit-rate Image Compression Core

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

Low bit rate image compression core for onboard space applications

Marco Lanuzza, Stefania Perri, Pasquale Corsonello, 2006, IEEE Transactions on Circuits and Systems for Video Technology.