C. Ren

Thermally robust TaTb/sub x/N metal gate electrode for n-MOSFETs applications

D.S.H. Chan, N. Balasubramanian, D. Kwong, 2005, IEEE Electron Device Letters.

Mechanism of positive-bias temperature instability in sub-1-nm TaN/HfN/HfO/sub 2/ gate stack with low preexisting traps

D.S.H. Chan, J.F. Kang, R.Q. Han, 2005, IEEE Electron Device Letters.

Lanthanide-incorporated metal nitrides with tunable work function and good thermal stability for NMOS devices

D.S.H. Chan, N. Balasubramanian, A.D. Trigg, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Scalability and Reliability Characteristics of CVD HfO2 Gate Dielectrics with HfN Electrodes for Advanced CMOS Applications

D.S.H. Chan, Jinfeng Kang, Dim-Lee Kwong, 2007 .

Thermally robust high quality HfN/HfO/sub 2/ gate stack for advanced CMOS devices

D.S.H. Chan, J.F. Kang, J.D. Chen, 2003, IEEE International Electron Devices Meeting 2003.

Tuning effective metal gate work function by a novel gate dielectric HfLaO for nMOSFETs

A. Chin, M.B. Yu, X.P. Wang, 2006, IEEE Electron Device Letters.

Ultrathin HfO 2 "EOT 0.75 nm… Gate Stack with TaN/HfN Electrodes Fabricated Using a High-Temperature Process

Jinfeng Kang, Dim-Lee Kwong, X. Y. Liu, 2005 .

A Novel Dual-Metal Gate Integration Process for Sub-1nm EOT HfO2 CMOS Devices

D.S.H. Chan, X. P. Wang, J. F. Kang, 2004 .

Improved electrical and reliability Characteristics of HfN--HfO/sub 2/-gated nMOSFET with 0.95-nm EOT fabricated using a gate-first Process

D.S.H. Chan, J.F. Kang, R.Q. Han, 2005, IEEE Electron Device Letters.

Fermi-level pinning induced thermal instability in the effective work function of TaN in TaN/SiO/sub 2/ gate stack

D.S.H. Chan, J.F. Kang, D. Kwong, 2004, IEEE Electron Device Letters.