B. Dunne

发表

Mid-process through silicon vias technology using tungsten metallization: Process optimazation and electrical results

R. Anciant, N. Sillon, D. Henry, 2009, 2009 11th Electronics Packaging Technology Conference.

Via First Technology Development Based on High Aspect Ratio Trenches Filled with Doped Polysilicon

X. Baillin, N. Sillon, D. Henry, 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

Through Silicon Vias Technology for CMOS Image Sensors Packaging: Presentation of Technology and Electrical Results

R. Anciant, P. Chausse, N. Hotellier, 2008, 2008 10th Electronics Packaging Technology Conference.