W. Vanherle

发表

3-D Sequential Stacked Planar Devices Featuring Low-Temperature Replacement Metal Gate Junctionless Top Devices With Improved Reliability

F. M. Bufler, F. Inoue, R. Ritzenthaler, 2018, IEEE Transactions on Electron Devices.

Ge nFET with high electron mobility and superior PBTI reliability enabled by monolayer-Si surface passivation and La-induced interface dipole formation

L. Witters, N. Collaert, S. Sioncke, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal

K. Wostyn, J. Geypen, H. Bender, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

Si cap passivation for Ge nMOS applications

Aaron Thean, Nadine Collaert, Laura Nyns, 2013 .

Seedless Templated Growth of Hetero-Nanostructures for Novel Microelectronics Devices

H. Bender, F. Iacopi, R. Loo, 2009 .

3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability

B. Parvais, A. Vandooren, G. Hellings, 2018, 2018 IEEE Symposium on VLSI Technology.

Ge-on-Si and Ge-on-SOI thermo-optic phase shifters for the mid-infrared.

Gunther Roelkens, Muhammad Muneeb, Roger Loo, 2014, Optics express.

Reliable 50Gb/s silicon photonics platform for next-generation data center optical interconnects

J. De Coster, S. Balakrishnan, K. Croes, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

50Gb/s C-band GeSi waveguide electro-absorption modulator

Joris Van Campenhout, Ingrid De Wolf, S. Balakrishnan, 2016, 2016 Optical Fiber Communications Conference and Exhibition (OFC).

High Ge Content SiGe Selective Processes for Source/Drain in Manufacturing the Next Generations of pMOS Transistors

A. Hikavyy, R. Loo, L. Witters, 2013 .

Growth of high Ge content SiGe on (110) oriented Si wafers

A. Hikavyy, H. Bender, R. Loo, 2012 .

Pedestal collector optimization for high speed SiGe:C HBT

S. Decoutere, S. Van Huylenbroeck, K. De Meyer, 2011, 2011 IEEE Bipolar/BiCMOS Circuits and Technology Meeting.

Editors' Choice—Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures

B. Douhard, O. Richard, D. Mocuta, 2018 .

First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers

B. Parvais, A. Vandooren, J. Ryckaert, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

Low Temperature Pre-Epi Treatment: Critical Parameters to Control Interface Contamination

A. Hikavyy, R. Loo, M. Caymax, 2009 .