E. Chiu

Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal

K. Wostyn, J. Geypen, H. Bender, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition

L. Witters, N. Waldron, D. Mocuta, 2017, IEEE Transactions on Electron Devices.

Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

A. Vais, C. Merckling, N. Waldron, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).