Ningyi Xu

发表

Using Data Compression for Optimizing FPGA-Based Convolutional Neural Network Accelerators

Jason Cong, Chen Zhang, Yijin Guan, 2017, APPT.

FxpNet : Training deep convolutional neural network in fixed-point representation

Xi Chen, Xiaolin Hu, Hucheng Zhou, 2016 .

Making Human Connectome Faster: GPU Acceleration of Brain Network Analysis

Yu Wang, Huazhong Yang, Yong He, 2010, 2010 IEEE 16th International Conference on Parallel and Distributed Systems.

The Analysis of Research Hotspots and Fronts of Knowledge Visualization Based on CiteSpace II

Guoqing Zhao, Huiling Chen, Ningyi Xu, 2012, ICHL.

Crane: Mitigating Accelerator Under-utilization Caused by Sparsity Irregularities in CNNs

Jason Cong, Yuan Xie, Yijin Guan, 2020, IEEE Transactions on Computers.

RankBoost Acceleration on both NVIDIA CUDA and ATI Stream Platforms

Feng Yan, Yu Wang, Bo Wang, 2009, 2009 15th International Conference on Parallel and Distributed Systems.

ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture

Yu Wang, Huazhong Yang, Yuze Chi, 2017, FPGA.

FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates

Xi Chen, Wei Zhang, Jason Cong, 2017, 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

Implementation and simulation of a cluster-based hierarchical NoC architecture for multi-processor SoC

Zucheng Zhou, Feng Dong, Ningyi Xu, 2005, IEEE International Symposium on Communications and Information Technology, 2005. ISCIT 2005..

Gemma in April: A matrix-like parallel programming architecture on OpenCL

Yu Wang, Huazhong Yang, Hong Luo, 2011, 2011 Design, Automation & Test in Europe.

Parallel Inference for Latent Dirichlet Allocation on Graphics Processing Units

Feng Yan, Yuan Qi, Ningyi Xu, 2009, NIPS.

A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis

Yu Wang, Huazhong Yang, Yong He, 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Energy efficient neural networks for big data analytics

Rong Luo, Yu Wang, Yiran Chen, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

ClickNP: Highly Flexible and High Performance Network Processing with Reconfigurable Hardware

Yongqiang Xiong, Peng Cheng, Kun Tan, 2016, SIGCOMM.

FPMR: MapReduce Framework on FPGA A Case Study of RankBoost Acceleration

Huazhong Yang, Yi Shan, Bo Wang, 2010 .

Probabilistic Brain Fiber Tractography on GPUs

Yu Wang, Huazhong Yang, Yi Xu, 2012, 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops & PhD Forum.

A single receiving chip for DVB data broadcasting system

Guanghui He, Zucheng Zhou, Wei Yu, 2006, IEEE Transactions on Consumer Electronics.

The Colored Concept Map and Its Application in Learning Assistance Program

Guoqing Zhao, Huiling Chen, Ningyi Xu, 2012, ICHL.

Efficient PageRank and SpMV Computation on AMD GPUs

Feng Yan, Yu Wang, Bo Wang, 2010, 2010 39th International Conference on Parallel Processing.

Large scale recurrent neural network on GPU

Yu Wang, Huazhong Yang, Jiaxing Zhang, 2014, 2014 International Joint Conference on Neural Networks (IJCNN).

Efficient Weighted Histogramming on GPUs with CUDA

Feng-Hsiung Hsu, Chunshui Zhao, Ningyi Xu, 2013 .

The Feniks FPGA Operating System for Cloud Computing

Yongqiang Xiong, Jiansong Zhang, Thomas Moscibroda, 2017, APSys.

Going Deeper with Embedded FPGA Platform for Convolutional Neural Network

Yu Wang, Huazhong Yang, Jie Wang, 2016, FPGA.

Real-time high-quality stereo vision system in FPGA

Yu Wang, Wenqiang Wang, Jing Yan, 2013, 2013 International Conference on Field-Programmable Technology (FPT).

FlexSaaS: A Reconfigurable Accelerator for Web Search Selection

Derek Chiou, Ming Wu, Wenqiang Wang, 2019, ACM Trans. Reconfigurable Technol. Syst..

FPGA and GPU implementation of large scale SpMV

Yu Wang, Bo Wang, Huazhong Yang, 2010, 2010 IEEE 8th Symposium on Application Specific Processors (SASP).

A high parallel-pipelined real-time estimation architecture for MPEG-4 simple profile

Xiaokang Lin, Ningyi Xu, Dongjun Lou, 2004, APCC/MDMC '04. The 2004 Joint Conference of the 10th Asia-Pacific Conference on Communications and the 5th International Symposium on Multi-Dimensional Mobile Communications Proceeding.

Correction: A Hybrid CPU-GPU Accelerated Framework for Fast Mapping of High-Resolution Human Brain Connectome

Yu Wang, Huazhong Yang, Yong He, 2013, PLoS ONE.