T. Shimizu

A single-chip Si-LDMOS power amplifier for GSM

M. Hotta, Y. Matsunaga, I. Yoshida, 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

A highly stable SRAM memory cell with top-gated P-N drain poly-Si TFTs for 1.5 V operation

K. Noda, S. Kumashiro, T. Shimizu, 1996, International Electron Devices Meeting. Technical Digest.

A multimedia 32b RISC microprocessor

T. Shimizu, T. Shimizu, 1996 .

A 450 MHz 64 b RISC processor using multiple threshold voltage CMOS

K. Mori, H. Takahashi, K. Higeta, 2000, 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

A simple equation model for RF MOS FET

N. Ishihara, T. Shimizu, N. Ishihara, 2006, Digest of Papers. 2006 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

A 10b 20mhz Two-Step Parallel ADC with Internal S/H

K. Maio, M. Hotta, S. Ueda, 1988, 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers.

Voltage limiters for DRAMs with substrate-plate-electrode memory cells

T. Takeshima, T. Shimizu, Masahide Takada, 1988 .