E. Ayranci

A 12b 2.9GS/s DAC with IM3 ≪−60dBc beyond 1GHz in 65nm CMOS

Xiaodong Liu, Yu Lin, Chi-Hung Lin, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

A 12-bit 800 MS/s Dual-Residue Pipeline ADC

Jan Mulder, Jan R. Westra, Christopher M. Ward, 2013 .

A 12 bit 2.9 GS/s DAC With IM3 $ ≪ -$60 dBc Beyond 1 GHz in 65 nm CMOS

Yu Lin, Jan Mulder, Jan R. Westra, 2009, IEEE Journal of Solid-State Circuits.

Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop

P. Andreani, E. Ayranci, K. Christensen, 2007, EUROCON 2007 - The International Conference on "Computer as a Tool".