E. Takahashi

A GA hardware engine for post-fabrication clock-timing adjustment

I. Kajitani, M. Murakawa, E. Takahashi, 2003, 2003 46th Midwest Symposium on Circuits and Systems.

8Gbps Parallel Data Transmission with Adaptive I/O Circuit

T. Higuchi, E. Takahashi, N. Endou, 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

Post-fabrication clock-timing adjustment using genetic algorithms

M. Murakawa, E. Takahashi, T. Higuchi, 2004, IEEE Journal of Solid-State Circuits.

A study of a high bandwidth and low latency interconnection network in PIE64

H. Tanaka, E. Takahashi, H. Koike, 1991, [1991] IEEE Pacific Rim Conference on Communications, Computers and Signal Processing Conference Proceedings.

Galois field computation LSI: a reconfigurable chip for high-speed communication

T. Higuchi, E. Takahashi, N. Endou, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Circuits, 2005..

Development of evolvable hardware at Electrotechnical Laboratory

Isamu Kajitani, Masaya Iwata, Tetsuya Higuchi, 2000, 2000 26th Annual Conference of the IEEE Industrial Electronics Society. IECON 2000. 2000 IEEE International Conference on Industrial Electronics, Control and Instrumentation. 21st Century Technologies.

An unmanned watching system using video cameras

E. Takahashi, K. Yazawa, E. Nakamae, 1990, IEEE Computer Applications in Power.

A post-silicon clock timing adjustment using genetic algorithms

M. Murakawa, E. Takahashi, T. Higuchi, 2003, 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408).