P. Hopper

发表

Test structures and test methodology for developing high voltage ESD protection

A. Concannon, V. Vashchenko, M. ter Beek, 2003, International Conference on Microelectronic Test Structures, 2003..

Increasing the ESD protection capability of over-voltage NMOS structures by comb-ballasting region design

V.A. Vashchenko, A. Concannon, M. ter Beek, 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

262. Aircraft Static Display Radiation Remediation

P. Hopper, 2006 .

Improving the ESD self-protection capability of integrated power NLDMOS arrays

G. Groeseneken, D. Linten, S. Thijs, 2010, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010.

Multi-port ESD protection using bi-directional SCR structures

A. Concannon, M. ter Beek, P. Hopper, 2003, 2003 Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (IEEE Cat. No.03CH37440).

ESD-implant effect on protection capability of NMOS structures

V.A. Vashchenko, M. ter Beek, P. Hopper, 2003, ESSDERC '03. 33rd Conference on European Solid-State Device Research, 2003..

Successful Opening and Disposal to-Date of Mixed CERCLA Waste at the ORR-EMWMF

P. Hopper, P. Corpstein, R. McNutt, 2003 .

High holding voltage cascoded LVTSCR structures for 5.5-V tolerant ESD protection clamps

V.A. Vashchenko, M. ter Beek, P. Hopper, 2004, IEEE Transactions on Device and Materials Reliability.

ESD protection of double-diffusion devices in submicron CMOS processes

V.A. Vashchenko, P. Hopper, A. Concannon, 2004, Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850).

Implementation of 60V tolerant dual direction ESD protection in 5V BiCMOS process for automotive application

V.A. Vashchenko, M. ter Beek, P. Hopper, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.

Emitter injection control in LVTSCR for latch-up free ESD protection

A. Concannon, V. Vashchenko, P. Hopper, 2002, 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595).

Mixed Device-Circuit Solution for ESD Protection of High-Voltage Fast pins

V.A. Vashchenko, V. Kuznetsov, E. Rosenbaum, 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

A CAD assisted design and optimisation methodology for over-voltage ESD protection circuits

Michiel Steyaert, Guido Groeseneken, J.-J. Yang, 2004, Microelectron. Reliab..

Bipolar SCR ESD devices

Vladislav A. Vashchenko, P. Hopper, 2005, Microelectron. Reliab..

Active Control of the Triggering Characteristics of NPN BJT, BSCR and NLDMOS-SCR Devices

V.A. Vashchenko, P. Hopper, D. Farrenkopf, 2007, Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.

A device level negative feedback in the emitter line of SCR-structures as a method to realize latch-up free ESD protection

V.A. Vashchenko, A. Concannon, M. ter Beek, 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

On-wafer human metal model measurements for system-level ESD analysis

G. Groeseneken, M. Sawada, D. Linten, 2009, 2009 31st EOS/ESD Symposium.

HBM parameter extraction and Transient Safe Operating Area

M. Sawada, D. Linten, S. Thijs, 2010, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010.

High performance SCRs for on-chip ESD protection in high voltage BCD processes

V.A. Vashchenko, A. Concannon, M. ter Beek, 2003, ISPSD '03. 2003 IEEE 15th International Symposium on Power Semiconductor Devices and ICs, 2003. Proceedings..

BSCR ESD protection in 250V process taking into account the turn-off effect

V.A. Vashchenko, P. Hopper, 2005, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, 2005..

Comparison of ESD protection capability of lateral BJT, SCR and bidirectional. SCR for hi-voltage BiCMOS circuits

A. Concannon, V. Vashchenko, P. Hopper, 2002, Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting.

Parallelization of a large‐scale computational earthquake simulation program

Kristy F. Tiampo, John B. Rundle, P. Hopper, 2002, Concurr. Comput. Pract. Exp..

Small footprint trigger voltage control circuit for mixed-voltage applications

E. Rosenbaum, V. Vashchenko, P. Hopper, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

Bipolar SCR ESD protection in a 0.25 /spl mu/m Si-Ge process using subcollector region modification

V.A. Vashchenko, M. ter Beek, P. Hopper, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

LVTSCR structures for latch-up free ESD protection of BiCMOS RF circuits

Ann Concannon, Vladislav A. Vashchenko, Marcel ter Beek, 2003, Microelectron. Reliab..

Self-protection capability of power arrays

G. Groeseneken, M. Sawada, D. Linten, 2009, 2009 31st EOS/ESD Symposium.

Stacked BSCR ESD protection for 250V tolerant circuits

M. ter Beek, P. Hopper, V. A. Vashchenko, 2004, 2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs.

SCCF — System to component level correlation factor

M. Sawada, D. Linten, S. Thijs, 2010, Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2010.

Quasi-3D simulation approach for comparative evaluation of triggering ESD protection structures

Ann Concannon, Vladislav A. Vashchenko, Marcel ter Beek, 2003, Microelectron. Reliab..

Physical limitation of the cascoded snapback NMOS ESD protection capability due to the non-uniform turn-off

V.A. Vashchenko, M. ter Beek, P. Hopper, 2004, IEEE Transactions on Device and Materials Reliability.

A dual-base triggered SCR with very low leakage current and adjustable trigger voltage

E. Rosenbaum, P. Hopper, V. Vashchenko, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

ESD protection of the high voltage tolerant pins in low-voltage BiCMOS processes

M. ter Beek, P. Hopper, V.A. Vashchenko, 2004, Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting.

Ultra-Compact Power Conversion Based on a CMOS-Compatible Microfabricated Power Inductor with Minimized Core Losses

P. Hopper, P. Smeys, Xiaosong Wu, 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.

Extreme voltage and current overshoots in HV snapback devices during HBM ESD stress

M. Sawada, P. Jansen, D. Linten, 2008, EOS/ESD 2008 - 2008 30th Electrical Overstress/Electrostatic Discharge Symposium.

Voltage overshoot study in 20V DeMOS-SCR devices

M. Sawada, P. Jansen, S. Thijs, 2007, 2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

Implementation of high VT turn-on in low-voltage SCR devices

P. Lindorfer, P. Hopper, V.A. Vashchenko, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

Electrical characteristics and reliability of extended drain voltage NMOS devices with multi-RESURF junction

D. Brisbin, P. Lindorfer, P. Chaparala, 2005, 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual..

The effect of polysilicon doping on the reverse short-channel effect in sub-quarter micron NMOS transistors

A. Kalnitsky, P. Hopper, A. Bergemont, 2001 .