G. Gaudin

300 mm InGaAsOI substrate fabrication using the Smart CutTM technology

F. Fournel, C. Morales, J. Widiez, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability

B. Parvais, A. Vandooren, G. Hellings, 2018, 2018 IEEE Symposium on VLSI Technology.

(Invited) An Overview of Patterned Metal/Dielectric Surface Bonding: Mechanism, Alignment and Characterization

Laurent Clavelier, Didier Landru, Ionut Radu, 2010 .

Study towards integration of In0.53Ga0.47As on 300 mm Si for CMOS sub-7 nm node: Development of thin graded InxGa1−xAs buffers on GaAs

Robert Langer, Matty Caymax, Bernardette Kunert, 2016 .