C.V. Thompson

Using line-length effects to optimize circuit-level reliability

C.V. Thompson, 2008, 2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits.

Contrasting failure characteristics of different levels of Cu dual-damascene metallization

S. Hau-Riege, W. K. Choi, C. Thompson, 2002, Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits (Cat. No.02TH8614).

Circuit-level reliability requirements for Cu metallization

D. Troxel, C. Thompson, S. Alam, 2005, IEEE Transactions on Device and Materials Reliability.

Experiments and models for circuit-level assessment of the reliability of Cu metallization

C.V. Thompson, D.E. Troxel, S.M. Alam, 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).