Xiaogen Yin

发表

Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation

Huilong Zhu, Yongkui Zhang, Xiaogen Yin, 2020, IEEE Electron Device Letters.

First Demonstration of Novel Vertical Gate-All-Around Field-Effect-Transistors Featured by Self-Aligned and Replaced High-κ Metal Gates.

Guilei Wang, Junfeng Li, Huilong Zhu, 2021, Nano letters.

Study of Isotropic and Si-Selective Quasi Atomic Layer Etching of Si1−xGex

Guilei Wang, Huilong Zhu, H. Radamson, 2020 .

Study of selective isotropic etching Si1−xGex in process of nanowire transistors

Guilei Wang, Junfeng Li, H. Yin, 2019, Journal of Materials Science: Materials in Electronics.

Study of Silicon Nitride Inner Spacer Formation in Process of Gate-all-around Nano-Transistors

Jianfeng Gao, A. Du, Guilei Wang, 2020, Nanomaterials.

A Novel Dry Selective Isotropic Atomic Layer Etching of SiGe for Manufacturing Vertical Nanowire Array with Diameter Less than 20 nm

Jianfeng Gao, A. Du, Guilei Wang, 2020, Materials.

Selective Digital Etching of Silicon-Germanium using Nitric and Hydrofluoric Acids.

A. Du, Guilei Wang, Huilong Zhu, 2020, ACS applied materials & interfaces.

Strained Si0.2Ge0.8/Ge multilayer Stacks Epitaxially Grown on a Low-/High-Temperature Ge Buffer Layer and Selective Wet-Etching of Germanium

Luyue Xie, A. Du, Guilei Wang, 2020, Nanomaterials.

A Study of Selectively Digital Etching Silicon-Germanium with Nitric and Hydrofluoric Acids

Technology of China, A. Du, Guilei Wang, 2020, 2003.03529.

Phase Diagram of MgCl2-LiCl-Na2SiO3-H2O System at 200°C and Synthesis of Hectorite

Y. Jing, Yongzhong Jia, Xiaogen Yin, 2011 .

Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits

Qiang Huo, Huilong Zhu, Zhenhua Wu, 2021, Microelectron. J..

Growth and Selective Etch of Phosphorus-Doped Silicon/Silicon–Germanium Multilayers Structures for Vertical Transistors Application

Guilei Wang, Huilong Zhu, H. Radamson, 2020, Nanoscale Research Letters.

Investigation of ferroelectric field-effect transistors using a replacement metal gate process

Huilong Zhu, Junjie Li, Gaobo Xu, 2020 .

Investigation of device-circuit for negative capacitance vertical nanowire FETs based on SPICE model

Huilong Zhu, Zhenhua Wu, Yongkui Zhang, 2020, Semiconductor Science and Technology.

The Investigation of Negative Capacitance Vertical Nanowire FETs Based on SPICE Model at Device-Circuit Level pdf

Qiang Huo, Huilong Zhu, Weixing Huang, 2020, ArXiv.

Negative-Capacitance Characteristics in a Steady-State Ferroelectric Capacitor Made of Parallel Domains

Chao Zhao, Huilong Zhu, Xiaogen Yin, 2017, IEEE Electron Device Letters.

Investigation of Negative DIBL Effect and Miller Effect for Negative Capacitance Nanowire Field-Effect-Transistors

Huilong Zhu, Zhenhua Wu, Yongkui Zhang, 2020, IEEE Journal of the Electron Devices Society.

Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process

A. Du, H. Yin, Huilong Zhu, 2021, IEEE Transactions on Electron Devices.

Ferroelectric Vertical Gate-All-Around Field-Effect-Transistors With High Speed, High Density, and Large Memory Window

Junfeng Li, Huilong Zhu, J. Xiang, 2022, IEEE Electron Device Letters.