G. Bai

发表

Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation

Huilong Zhu, Yongkui Zhang, Xiaogen Yin, 2020, IEEE Electron Device Letters.

Self-Aligned Contacting Processes for the 80 nm p-MTJ Device Fabrication by Wet Approach

Jiaqi Wei, H. Cui, K. Cao, 2018, Solid State Phenomena.

Alleviation of Negative-Bias Temperature Instability in Si p-FinFETs With ALD W Gate-Filling Metal by Annealing Process Optimization

E. Simoen, Z. Ji, Guilei Wang, 2021, IEEE Journal of the Electron Devices Society.

Growth of high-quality epitaxy of GaAs on Si with engineered Ge buffer using MOCVD

Guilei Wang, H. Radamson, Wenwu Wang, 2021, Journal of Materials Science: Materials in Electronics.

Vertical N-Type and P-Type Nanosheet FETs With C-Shaped Channel

A. Du, J. Liu, J. Xiang, 2023, IEEE Transactions on Electron Devices.

Near-ideal subthreshold swing MoS2 back-gate transistors with an optimized ultrathin HfO2 dielectric layer

Huaxiang Yin, Zhenhua Wu, Qingzhu Zhang, 2019, Nanotechnology.

Modeling of SiNx growth by chemical vapor deposition in nanosheet indentation

Yayi Wei, Rui Chen, Junfeng Li, 2023, Advanced Lithography.

Modeling of SiN inner spacer deposition in gate-all-around nanosheet FET process

Jun Yu Li, Yayi Wei, Rui Chen, 2022, Advanced Lithography.

Vertical C-Shaped-Channel Nanosheet FETs Featured With Precise Control of Both Channel-Thickness and Gate-Length

A. Du, J. Liu, Z. Kong, 2022, IEEE Electron Device Letters.

Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process

A. Du, H. Yin, Huilong Zhu, 2021, IEEE Transactions on Electron Devices.