Hyun-Min Kim

Fabrication of asymmetric independent dual-gate FinFET using sidewall spacer patterning and CMP processes

Min-Chul Sun, Byung-Gook Park, Jong-Ho Lee, 2018 .

Analysis on Endurance Characteristics of Ferroelectric Memory Device

Munhyeon Kim, Sihyun Kim, Hyun-Min Kim, 2022, 2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC).

Negative Capacitance Field-Effect Transistor with Hetero-Dielectric Structure for Suppression of Reverse Drain Induced Barrier Lowering

D. Kwon, Dong-Oh Kim, Sihyun Kim, 2022, Solid-State Electronics.

Improvement in Self-Heating Characteristic by Incorporating Hetero-Gate-Dielectric in Gate-All-Around MOSFETs

Young Suh Song, J. Kim, Sang Wan Kim, 2021, IEEE Journal of the Electron Devices Society.

Simulation of the effect of parasitic channel height on characteristics of stacked gate-all-around nanosheet FET

Kyoung Yeon Kim, Young Suh Song, Sang Wan Kim, 2020 .

Surface Ge-rich p-type SiGe channel tunnel field-effect transistor fabricated by local condensation technique

Sang Wan Kim, Byung-Gook Park, Munhyeon Kim, 2020 .