Toyoji Yamamoto

Effects of Si passivation on Ge metal-insulator-semiconductor interface properties and inversion-layer hole mobility

Shinichi Takagi, Yoshimi Yamashita, Naoharu Sugiyama, 2008 .

Opportunities and Challenges of FinFET as a Device Structure Candidate for 14nm Node CMOS Technology

Andres Bryant, Theodorus Standaert, Tenko Yamashita, 2011 .

Effects of Selecting Channel Direction in Improving Performance of Sub-100 nm MOSFETs Fabricated on (110) Surface Si Substrate

Masami Hane, T. Iwamoto, Tatsuya Ezaki, 2004 .

Impact of Gradual Source/Drain Impurity Profiles on Performance of Germanium Channel Double-Gated pMISFETs

Shinichi Takagi, Yoshimi Yamashita, Naoharu Sugiyama, 2007 .

0.15 /spl mu/m CMOS with high reliability and performance

Masao Fukuma, Akira Tanabe, Hidenobu Miyamoto, 1993, Proceedings of IEEE International Electron Devices Meeting.

Electrical properties of 1.5-nm SiON gate-dielectric using radical oxygen and radical nitrogen

Tohru Mogami, Toru Tatsumi, M. Togo, 2002 .