Róbert Lórencz

发表

Proposal and Properties of Ring Oscillator-Based PUF on FPGA

Róbert Lórencz, Filip Kodýtek, 2016, J. Circuits Syst. Comput..

Design of a Residue Number System Based Linear System Solver in Hardware

Róbert Lórencz, Jirí Bucek, Pavel Kubalík, 2017, J. Signal Process. Syst..

Parallel Solver of Large Systems of Linear Inequalities Using Fourier-Motzkin Elimination

Róbert Lórencz, Ivan Simecek, Richard Fritsch, 2016, Comput. Informatics.

Arithmetic Unit for Computations in GF(p) with the Left-Shifting Multiplicative Inverse Algorithm

Róbert Lórencz, Josef Hlavác, 2013, ARCS.

True Random Number Generator Based on ROPUF Circuit

Róbert Lórencz, Filip Kodýtek, Jirí Bucek, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

An ASIC linear congruence solver synthesized with three cell libraries

Róbert Lórencz, Jirí Bucek, Pavel Kubalík, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Malware Detection Using a Heterogeneous Distance Function

Róbert Lórencz, Martin Jurecek, R. Lórencz, 2018, Comput. Informatics.

Comparison of FPGA and ASIC Implementation of a Linear Congruence Solver

Róbert Lórencz, Jirí Bucek, Pavel Kubalík, 2013, 2013 Euromicro Conference on Digital System Design.

System on chip design of a linear system solver

Róbert Lórencz, Jirí Bucek, Pavel Kubalík, 2014, 2014 International Symposium on System-on-Chip (SoC).

Dedicated hardware implementation of a linear congruence solver in FPGA

Róbert Lórencz, Jirí Bucek, Pavel Kubalík, 2012, 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012).

Temperature Dependence of ROPUF on FPGA

Róbert Lórencz, Filip Kodýtek, Jirí Bucek, 2016, 2016 Euromicro Conference on Digital System Design (DSD).

GPU Solver for Systems of Linear Equations with Infinite Precision

Róbert Lórencz, Jiri Khun, Ivan Simecek, 2015, 2015 17th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC).

Subtraction-free Almost Montgomery Inverse algorithm

Róbert Lórencz, Josef Hlavác, 2005, Inf. Process. Lett..

A Design of Ring Oscillator Based PUF on FPGA

Róbert Lórencz, Filip Kodýtek, R. Lórencz, 2015, 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Comparing Subtraction-Free and Traditional AMI

Róbert Lórencz, Jirí Bucek, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

New Algorithm for Classical Modular Inverse

Róbert Lórencz, R. Lórencz, 2002, CHES.

Architecture of a Parallel MOSFET Parameter Extraction System

Róbert Lórencz, Tomás Zahradnický, 2013, ARCS.

Making ProTools Accessible for Visually Impaired

Róbert Lórencz, Tomás Zahradnický, Pavel Musil, 2008, ICCHP.

Making Nonaccessible Applications Accessible for Visually Impaired

Róbert Lórencz, Tomás Zahradnický, 2006, ICCHP.

Using Power-Up SRAM State of Atmel ATmega1284P Microcontrollers as Physical Unclonable Function for Key Generation and Chip Identification

Róbert Lórencz, Josef Hlavác, Mikhail Platonov, 2013, Inf. Secur. J. A Glob. Perspect..

True random number generator based on ring oscillator PUF circuit

Róbert Lórencz, Filip Kodýtek, Jirí Bucek, 2017, Microprocess. Microsystems.

Improved ring oscillator PUF on FPGA and its properties

Róbert Lórencz, Filip Kodýtek, Jirí Bucek, 2016, Microprocess. Microsystems.

Application of Distance Metric Learning to Automated Malware Detection

Róbert Lórencz, Martin Jureček, R. Lórencz, 2021, IEEE Access.

Automatic Detection and Decryption of AES by Monitoring S-Box Access

Róbert Lórencz, Josef Kokes, Jonatan Matejka, 2021, ICISSP.

Improving Classification of Malware Families using Learning a Distance Metric

Róbert Lórencz, Martin Jurecek, Olha Jurecková, 2021, ICISSP.

Active Directory Kerberoasting Attack: Detection using Machine Learning Techniques

Róbert Lórencz, Lukás Kotlaba, Simona Buchovecká, 2021, ICISSP.

Arithmetic Unit Based on Continued Fractions

Róbert Lórencz, Tomáš Brabec, 2006 .