C.J. Choi

Highly manufacturable sub-100 nm DRAM integrated with full functionality

J.K. Cho, J.J. Lee, S. Choi, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

A highly manufacturable 110 nm DRAM technology with 8F/sup 2/ vertical transistor cell for 1Gb and beyond

W. Mueller, K. Varn, R. Jammy, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).