Manfred Glesner

发表

Reduction of Crosstalk Pessimism Using Tendency Graph Approach

Murthy Palla, Klaus Koch, Jens Bargfrede, 2006, 2006 International Conference on Computer Design.

Bus-Based Communication Synthesis on System-Level

Manfred Glesner, Michael Gasteier, 1996, TODE.

On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2004, PATMOS.

A Flexible Floating-Point Wavelet Processor

Manfred Glesner, Andre Guntoro, 2008, 2008 IEEE International Conference on Signal Image Technology and Internet Based Systems.

Inserting Data Encoding Techniques into NoC-Based Systems

Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms

Manfred Glesner, Thomas Hollstein, M. Glesner, 2007, Comput. Electr. Eng..

A state-serial Viterbi decoder architecture for digital radio on FPGA

Manfred Glesner, Mihail Petrov, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

Comparator-Based Switched-Capacitor Delta-Sigma Modulation

Manfred Glesner, M. Glesner, Bogomir Horvat, 2008 .

Automatic generation of a fuzzy classification system using fuzzy clustering methods

Manfred Glesner, Harald Genther, M. Glesner, 1994, SAC '94.

Design and Analysis of Extension-Rotation CORDIC Algorithms based on Non-Redundant Method

Manfred Glesner, Faizal Arya Samman, Pongyupinpanich Surapong, 2012 .

Evaluating the impact of data encoding techniques on the power consumption in networks-on-chip

Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II

Leandro Soares Indrusiak, Fernando Gehm Moraes, Jari Nurmi, 2010, 2010 International Symposium on System on Chip.

Executable system-level specification models containing UML-based behavioral patterns

Leandro Soares Indrusiak, Manfred Glesner, Andreas Thuy, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

Perceptrons revisited: the addition of a non-monotone recursion greatly enhances their representation and classification properties

Radu Dogaru, Manfred Glesner, Marinel Alangiu, 1999, IJCNN'99. International Joint Conference on Neural Networks. Proceedings (Cat. No.99CH36339).

High level hardware/software communication estimation in shared memory architecture

Max Mühlhäuser, Manfred Glesner, Heiko Zimmer, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Optimal FFT architecture selection for OFDM receivers on FPGA

Manfred Glesner, Mihail Petrov, 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random On-Chip Data Traffic

Manfred Glesner, Sujan Pandey, M. Glesner, 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Generation of Synthetic Floating-Point benchmark circuits

Philip Heng Wai Leong, Manfred Glesner, Peter Zipf, 2009, 2009 IEEE International Symposium on Parallel & Distributed Processing.

Power reduction techniques for an OFDM burst synchronization core

Alberto García Ortiz, Manfred Glesner, Lukusa D. Kabulepa, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A Multi-level Reconfigurable Architecture for a Wireless Sensor Node Coprocessing Unit

Manfred Glesner, François Philipp, 2011, 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum.

Signal Activity Analysis for High-Level Power Estimation in Time-Shared Linear Systems

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2007, J. Low Power Electron..

On the variance reduction of neural networks-experimental results for an automotive application

Manfred Glesner, Matthias Rychetsky, Stefan Ortmann, 1999, IJCNN'99. International Joint Conference on Neural Networks. Proceedings (Cat. No.99CH36339).

A configurable pipelined state machine as a hybrid ASIC and configurable architecture

Manfred Glesner, Peter Zipf, Claude Stötzler, 2004, IEEE Computer Society Annual Symposium on VLSI.

A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2006, ICCAD.

Design of an autonomous platform for distributed sensing-actuating systems

Manfred Glesner, Faizal Arya Samman, François Philipp, 2011, 2011 22nd IEEE International Symposium on Rapid System Prototyping.

Timing and Power Consumption in High-Speed Very Deep Sub-Micron On-Chip Interconnects

Leandro Soares Indrusiak, Manfred Glesner, Tudor Murgan, 2005 .

Moment-Based Power Estimation in Very Deep Submicron Technologies

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, ICCAD.

Systems on a Chip

Manfred Glesner, Peter Zipf, M. Glesner, 2004 .

On the Rapid Prototyping of Equalizers for OFDM Systems

Manfred Glesner, Thilo Pionteck, Lukusa D. Kabulepa, 2003, Des. Autom. Embed. Syst..

Pruning and Regularization Techniques for Feed Forward Nets Applied on a Real World Data Base

Manfred Glesner, Matthias Rychetsky, Stefan Ortmann, 1998, NC.

Eine WEB-basierte Simulationsumgebung für VHDL-AMS

Manfred Glesner, Thomas Hollstein, T. Schneider, 2001 .

A General CAD Concept And Design FrameworkArchitecture For Integrated Microsystems

Manfred Glesner, Bernard Courtois, Andras Poppe, 1970 .

Reconfigurable streaming processor core with interconnected floating-point arithmetic units for multicore adaptive signal processing systems

Manfred Glesner, Faizal Arya Samman, Surapong Pongyupinpanich, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2007, PATMOS.

Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport Networks

Ulrich Heinkel, Manfred Glesner, Tudor Murgan, 2005, ReCoSoC.

Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-Chip

Manfred Glesner, Sujan Pandey, Thomas Hollstein, 2005, ReCoSoC.

Efficient estimation of signal transition activity in MAC architectures

Alberto García Ortiz, Manfred Glesner, Lukusa D. Kabulepa, 2002, ISLPED '02.

IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter

Kong-Pang Pun, Philip Heng Wai Leong, Manfred Glesner, 2004, FPL.

On The Design of A Dynamically Reconfigurable Function-Unit for Error Detection and Correction

Manfred Glesner, Thomas Stiefmeier, Thilo Pionteck, 2005, VLSI-SoC.

Mass characterisation of organic transistors and Monte-Carlo circuit simulation

Manfred Glesner, Edgar Dörsam, Sebastian Pankalla, 2013 .

Transformierende Synthese zur Verlustleistungsreduktion mittels Partitionierung

Manfred Glesner, Marc Theisen, Burkart Voss, 2001, MBMV.

Automated communication synthesis for architecture-precise rapid prototyping of real-time embedded systems

Jürgen Becker, Manfred Glesner, Frank-Michael Renner, 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

Mikrosystemtechnik

Manfred Glesner, 1999, Informationstechnik Tech. Inform..

A novel software defined radio architecture with automatic power control for RFID readers

Manfred Glesner, Ping Zhao, Yuliang Zheng, 2009, 2009 IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems.

Moment-Based Estimation of Switching Activity for Correlated Distributions

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2004, PATMOS.

Security challenges for RFID key applications

Henk Birkholz, Karsten Sohr, Manfred Glesner, 2007 .

An area-efficient FPGA realisation of a codebook-based image compression method

Hui Shao, Radu Dogaru, Manfred Glesner, 2008, 2008 International Conference on Field-Programmable Technology.

A hierarchical generic approach for on-chip communication, testing and debugging of SoCs

Manfred Glesner, Peter Zipf, Christoph Mager, 2003, VLSI-SOC.

High Level Synthesis in an FPL-Based Computer Aided Prototyping Environment

Manfred Glesner, Peter Poechmueller, Hans-Jürgen Herpel, 1992, FPL.

Computing discrete time-frequency distributions using principal component filter bank

Manfred Glesner, Thuyen Le, 2000, 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100).

Embedding version-based asynchronous collaboration support in a design data model implemented as object-oriented framework

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Reis, 2005 .

Determination of target volumes for three-dimensional radiotherapy of cancer patients with a fuzzy system

Manfred Glesner, Wolfgang Schlegel, T. Waschek, 1997, Fuzzy Sets Syst..

A Verilog-A model of an undoped symmetric dual-gate MOSFET

Manfred Glesner, Oliver Soffke, O. Cobianu, 2006 .

Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach

Leandro Soares Indrusiak, Fernando Gehm Moraes, Pascal Benoit, 2013, TECS.

Microelectronics meets Bionics

Hao Wang, Manfred Glesner, Thomas Hollstein, 2005 .

Echtzeit Fahrbahnzustandserkennung mit Fuzzy-Neuronalen Netzen

Manfred Glesner, Saman Kumara Halgamuge, Hans-Jürgen Herpel, 1993, Fuzzy Days.

Distributed system-level design using pair-programming over Cave

Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, 2001 .

A reconfigurable wireless platform for biomedical signal processing

Manfred Glesner, Francois Philipp, 2013, The 6th 2013 Biomedical Engineering International Conference.

AnAnalogOn-ChipAdaptiveBodyBiasCalibration forReducingMismatchesinTransistorPairs

Manfred Glesner, Tudor Murgan, P. B. Bacinschi, 2008 .

A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters

Manfred Glesner, Andre Guntoro, 2008, VLSI-SoC.

A Concept for a Profile-based Dynamic Reconfiguration Mechanism

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2006, ReCoSoC.

Modelling of HF and UHF RFID Technology for System and Circuit Level Simulations

Manfred Glesner, Ping Zhao, Oliver Soffke, 2007 .

Hardware/software co-design für eingebettete Systeme in der Informationstechnik

Manfred Glesner, Thomas Hollstein, Andreas Kirschbaum, 1999 .

The XPP Architecture and Its Co-simulation Within the Simulink Environment

Manfred Glesner, Tudor Murgan, Mihail Petrov, 2004, FPL.

Development and Implementation of a Neural Knock Detector Using Constructive Learning Methods

Manfred Glesner, Stefan Ortmann, 1998, Int. J. Uncertain. Fuzziness Knowl. Based Syst..

Accelerated training of support vector machines

Manfred Glesner, Michael Ullmann, Matthias Rychetsky, 1999, IJCNN'99. International Joint Conference on Neural Networks. Proceedings (Cat. No.99CH36339).

Exploring Functional Unit Parallelism in Reconfigurable Computing Platforms

Leandro Soares Indrusiak, Manfred Glesner, Hua Zhong, 2006, ReCoSoC.

Dynamic power optimization of the trace-back process for the Viterbi algorithm

Manfred Glesner, Tudor Murgan, Mihail Petrov, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

DER "INTELLIGENTE REIFEN" - ZWISCHENERGEBNISSE EINER INTERDISZIPLINAEREN FORSCHUNGSKOOPERATION

Manfred Glesner, Hans L. Hartnagel, B Breuer, 1995 .

Einsatzmöglichkeiten resonanten Umladens als Schaltungstechnik zur Verlustleistungsreduktion in digitalen CMOS-Schaltungen

Manfred Glesner, Clemens Schlachta, Burkart Voss, 2002 .

A low power sinusoidal clock

Manfred Glesner, Burkart Voss, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Experiences on Actor-oriented Design of Reconfigurable Systems

Leandro Soares Indrusiak, Manfred Glesner, 2005, ReCoSoC.

Identification of Underwater Sonar Images Using Fuzzy-Neural Architecture FuNe I

Manfred Glesner, Saman K. Halgamuge, W. Poechmueller, 1993 .

Resonance circuits for adiabatic circuits

Manfred Glesner, Clemens Schlachta, 2003 .

Novel method of chaotic systems evaluation for implementations of encryption algorithms

Leandro Soares Indrusiak, Manfred Glesner, Weiler Alves Finamore, 2010, 2010 17th International Conference on Telecommunications.

A multi-path high speed Viterbi decoder

Alberto García Ortiz, Manfred Glesner, Mihail Petrov, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, FPL.

Rapid-prototyping of a CAN-Bus controller: a case study

Manfred Glesner, Andreas Kirschbaum, Frank-Michael Renner, 1996, Proceedings Seventh IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype.

A discrete algorithm for the regularization of hierarchical VHDL-AMS models

Manfred Glesner, Jochen Mades, D. E. Schwarz, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Transition activity estimation for general correlated data distributions [IC power estimation]

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, 16th International Conference on VLSI Design, 2003. Proceedings..

Timing Driven Partitioning of Combinational Logic

Norbert Wehn, Manfred Glesner, A. Kister, 1990, Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme.

Pipelined Control-Path Effects on Area and Performance of a Wormhole-Switched Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009 .

Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2006, PATMOS.

On the rapid prototyping of equalizers for OFDM systems

Manfred Glesner, Thilo Pionteck, Lukusa D. Kabulepa, 2002, Proceedings 13th IEEE International Workshop on Rapid System Prototyping.

Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures

Jürgen Becker, Manfred Glesner, Janusz A. Starzyk, 2000, PDPTA.

Rotating stall analysis using signal-adapted filter bank and Cohen's time-frequency distributions

Manfred Glesner, Thuyen Le, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A Decentralised Task Mapping Approach for Homogeneous Multiprocessor Network-On-Chips

Pascal Benoit, Manfred Glesner, Peter Zipf, 2009, Int. J. Reconfigurable Comput..

ILP-Based Board-Level Routing of Multi-Terminal Nets for Prototyping Reconfigurable Interconnect

Jürgen Becker, Manfred Glesner, Andreas Kirschbaum, 1999, VLSI.

An event-based middleware for the remote management of runtime hardware reconfiguration

Manfred Glesner, François Philipp, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

Prototyping of efficient hardware algorithms for data compression in future communication systems

Jürgen Becker, Manfred Glesner, Amar Mukherjee, 2001, Proceedings 12th International Workshop on Rapid System Prototyping. RSP 2001.

Synthese von Kommunikationsstrukturen und architekturgenaues Rapid-Prototyping eingebetteter Echtzeitsysteme

Jürgen Becker, Manfred Glesner, Andreas Kirschbaum, 2000, Informationstechnik Tech. Inform..

Performance Aware On-Chip Communication Synthesis and Optimization for Shared Multi-Bus Based Architecture

Max Mühlhäuser, Manfred Glesner, Sujan Pandey, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Automated feature selection strategies: an experimental comparison improving engine knock detection

Manfred Glesner, Stefan Ortmann, M. Rychetsky, 1998 .

A Programmable Look-Up Table-Based Interpolator with Nonuniform Sampling Scheme

Leandro Soares Indrusiak, Manfred Glesner, Weiler Alves Finamore, 2012, Int. J. Reconfigurable Comput..

A switch architecture and signal synchronization for GALS system-on-chips

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Manfred Glesner, Michel Renovell, Peter Zipf, 2002 .

Dynamically Reconfigurable Computing for Wireless Communication Systems (Dynamisch rekonfigurierbares Rechnen für Mobilfunksysteme)

Manfred Glesner, Peter Zipf, Thilo Pionteck, 2007, it Inf. Technol..

A constraint length and throughput parameterizable architecture for Viterbi decoders

Manfred Glesner, Alberto Ortiz, Abdulfattah M. Obeid, 2004 .

Real-time operation-based power consumption analysis for passive UHF RFID transponders

Manfred Glesner, Ping Zhao, Yuliang Zheng, 2009 .

Arbitrary function approximation in HDLs with application to the N-body problem

Philip Heng Wai Leong, Alberto García Ortiz, Manfred Glesner, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Analysis of bandpass sigma-delta modulator architectures

Manfred Glesner, Lukusa D. Kabulepa, Juan Jesus Ocampo Hidalgo, 2002, 9th International Conference on Electronics, Circuits and Systems.

High Performance of an AES-Rijndael ASIC working in OCB/ECB Modes of Operation

Manfred Glesner, Cristian Chitu, 2003, VLSI-SOC.

ARAMYS-A Bit-Serial SIMD-Processor for Fast Parallel Nearest Neighbor Search and Associative Processing

Manfred Glesner, Andreas König, Peter Windirsch, 1994 .

Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

On-chip efficient Round-Robin scheduler for high-speed interconnection

Manfred Glesner, Surapong Pongyupinpanich, 2011, 2011 22nd IEEE International Symposium on Rapid System Prototyping.

Configurable VLSI-architectures for both standard DCT and shape-adaptive DCT in future MPEG-4 circuit implementations

Manfred Glesner, Thuyen Le, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

A multistep extrapolated S-parameter model for arbitrary on-chip interconnect structures

Manfred Glesner, Petru Bogdan Bacinschi, M. Glesner, 2009, 2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC).

A CMOS universal neuron circuit, static and dynamic SPICE simulations

Radu Dogaru, Manfred Glesner, Cristian Chitu, 2003, Signals, Circuits and Systems, 2003. SCS 2003. International Symposium on.

Rapid prototyping of communication architectures

Manfred Glesner, Andreas Kirschbaum, 1997, Proceedings 8th IEEE International Workshop on Rapid System Prototyping Shortening the Path from Specification to Prototype.

Hardware Based Rapid Prototyping

Manfred Glesner, Tudor Murgan, Thomas Hollstein, 2008, Wiley Encyclopedia of Computer Science and Engineering.

Statistical modelling of the MPEG-4 FlexMux

Manfred Glesner, Ulrich Mayer, Jürgen Deicke, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Reconfigurable interconnect infrastructure for multi-FPGA-based adaptive multiprocessing systems

Manfred Glesner, Faizal Arya Samman, François Philipp, 2011, 2011 1st International Workshop on Computing in Heterogeneous, Autonomous 'N' Goal-Oriented Environments (CHANGE).

the Creative Commons Attribution 3.0 License.

Manfred Glesner, Andre Guntoro, 2009 .

A CMOS Compatible Charge Recovery Logic Family for Low Supply Voltages

Manfred Glesner, Clemens Schlachta, 2006, PATMOS.

An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions

Norbert Wehn, Manfred Glesner, Michael Münch, 1997, ISSS.

Communication Performance Estimation and Communication Synthesis for Architecture-precise Prototyping of Real-time Embedded Systems

Jürgen Becker, Manfred Glesner, Frank-Michael Renner, 2000, MBMV.

Impact of circuit nonidealities on the implementation of switched-capacitor resonators

Manfred Glesner, Andre Guntoro, Massoud Momeni, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor

Manfred Glesner, Andre Guntoro, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Design of a defect-tolerant and fully testable PLA

Manfred Glesner, A. Roth, N. Wehn, 1988, 1988., IEEE International Symposium on Circuits and Systems.

Impeller integrated measurement of cavitation erosive aggressiveness

Manfred Glesner, Clemens Schlachta, Bernd Stoffel, 2002 .

Fusion of neural networks and fractal image compression for image sequences in communication and medical imaging

Manfred Glesner, Stefan Ortmann, D. König, 1996 .

Visual inspection in industrial manufacturing

Manfred Glesner, Michael Gasteier, Andreas König, 1995, IEEE Micro.

Low-Complexity Adaptive Encoding Schemes Based on Partial Bus-Invert for Power Reduction in Buses Exhibiting Capacitive Coupling

Manfred Glesner, Tudor Murgan, Andre Guntoro, 2007, ReCoSoC.

Advanced hardware and software architectures for computational intelligence-application to a real world problem

Manfred Glesner, Matthias Rychetsky, Stefan Ortmann, 1998, Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204).

Approximative Synthese von Fuzzy - Controllern

Manfred Glesner, T. A. Runkler, 1993, Fuzzy Days.

Reconfiguration requirements for high speed wireless communication systems

Manfred Glesner, Clemens Schlachta, Thilo Pionteck, 2003, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798).

Exploring the Capabilities of Reconfigurable Hardware for OFDM-based WLANs

Manfred Glesner, Thilo Pionteck, Lukusa D. Kabulepa, 2003, VLSI-SOC.

Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms

Leandro Soares Indrusiak, Fernando Gehm Moraes, Jari Nurmi, 2010, Int. J. Embed. Real Time Commun. Syst..

An Object-Oriented Client/Server Architecture for Video-on-Demand Applications

Ulrich Mayer, Manfred Glesner, Jürgen Deicke, 1997, IDMS.

Using FEM models for the generation of microcomponent descriptions on various levels of interest

Manfred Glesner, Markus Lang, Klaus Hofmann, 1998 .

A hardware-in-the-loop system to evaluate the performance of small-world cellular automata

Radu Dogaru, Manfred Glesner, Clemens Schlachta, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Low-power CMOS active resistor independent of the threshold voltage

Manfred Glesner, Anca Manolescu, Cosmin Popa, 2002, 9th International Conference on Electronics, Circuits and Systems.

Networks-On-Chip Based on Dynamic Wormhole Packet Identity Mapping Management

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009, VLSI Design.

A Reconfigurable Hardware-Monitor for Communication Analysis in Distributed Real-Time Systems

Jürgen Becker, Manfred Glesner, Andreas Kirschbaum, 1998, IPPS/SPDP Workshops.

On-chip communication topology synthesis for shared multi-bus based architecture

Max Mühlhäuser, Manfred Glesner, Sujan Pandey, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Implementation and outcomes of FPGA-based system design in Mongolian education

Manfred Glesner, François Philipp, D. Erdenechimeg, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

A Power Estimation Model for an FPGA-Based Softcore Processor

Lei Deng, Manfred Glesner, Holger Blume, 2007, 2007 International Conference on Field Programmable Logic and Applications.

High-performance fpga-based floating-point adder with three inputs

Manfred Glesner, Andre Guntoro, 2008, 2008 International Conference on Field Programmable Logic and Applications.

DECADE — fast centroid approximation defuzzification for real time fuzzy control applications

Thomas A. Runkler, Manfred Glesner, 1994, SAC '94.

Functional modeling techniques for a wireless LAN OFDM transceiver

Manfred Glesner, Tudor Murgan, Peter Zipf, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Buffer-architecture exploration for routers in a hierarchical network-on-chip

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

Statische und dynamische CMOS-Schaltungstechniken im Vergleich

Norbert Wehn, Manfred Glesner, 1986, it Inf. Technol..

Engine knock detection using multi-feature classification by means of non-linear mapping

Manfred Glesner, S. Ortmann, M. Rychetsky, 1997 .

An accurate and fast technique for correcting spectral leakage in motor diagnosis

Antero Arkkio, Manfred Glesner, Javier Martinez, 2013, 2013 9th IEEE International Symposium on Diagnostics for Electric Machines, Power Electronics and Drives (SDEMPED).

Field programmable logic and applications : 12th international conference, proceedings, September 2-4, 2002

Manfred Glesner, 2002 .

Validation of executable application models mapped onto network-on-chip platforms

Leandro Soares Indrusiak, Fernando Gehm Moraes, Jari Nurmi, 2008, 2008 International Symposium on Industrial Embedded Systems.

High-level synthesis transformations for programmable architectures

Manfred Glesner, Peter Poechmueller, Fang Longsen, 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

The ALGIC Silicon Compiler System: Implementation, Design Experience and Results

Norbert Wehn, Manfred Glesner, Johannes Schuck, 1987, 24th ACM/IEEE Design Automation Conference.

Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations

Manfred Glesner, Wolfgang Ecker, Andreas Vombach, 1994, EURO-DAC '94.

Hardware Implementation of Kohonen’s Feature Map by Scalar and SIMD-Array Processors

Manfred Glesner, Andreas König, X. Geng, 1993 .

Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models

Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner, 2003, FDL.

An Efficient Fractional-Rate Interpolation Architecture

Manfred Glesner, Mihail Petrov, 2007, IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference.

Bachus: A VLSI Architecture for a Large Binary Associative Memory

Manfred Glesner, Martin Huch, Werner Poechmueller, 1990 .

Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in SystemC

Manfred Glesner, Peter Zipf, Michael Velten, 2005, GI Jahrestagung.

Novel approach on lifting-based DWT and IDWT processor with multi-context configuration to support different wavelet filters

Manfred Glesner, Andre Guntoro, 2008, 2008 International Conference on Application-Specific Systems, Architectures and Processors.

Technologies, Architectures, CAD and Applications of Complex Systems-on-Chip (SoC)

Jürgen Becker, Manfred Glesner, Thilo Pionteck, 2001 .

A linearization technique for radio frequency CMOS Gilbert-type mixers

Manfred Glesner, Anca Manolescu, Cosmin Popa, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Providing Memory Management Abstraction for Self-Reconfigurable Video Processing Platforms

Leandro Soares Indrusiak, Manfred Glesner, Kurt Franz Ackermann, 2009, Int. J. Reconfigurable Comput..

Rapid prototyping of FPGA based floating point DSP systems

Monk-Ping Leong, Philip Heng Wai Leong, Jürgen Becker, 2002, Proceedings 13th IEEE International Workshop on Rapid System Prototyping.

A Customizable LEON2-Based VLIW Processor

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2007, ReCoSoC.

Low-latency VLSI architecture of a 3-input floating-point adder

Manfred Glesner, Andre Guntoro, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects

Leandro Soares Indrusiak, Fernando Gehm Moraes, Manfred Glesner, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

Improvement of Standard and Non-Standard Floating-Point Operators

Manfred Glesner, Faizal Arya Samman, Pongyupinpanich Surapong, 1970 .

Energy Efficient Statistical On-Chip Communication Bus Synthesis for a Reconfigurable Architecture

Manfred Glesner, Sujan Pandey, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Rapid Prototyping of Real-Time Information Processing Units for Mechatronic Systems

Manfred Glesner, Hans-Jürgen Herpel, M. Glesner, 1998, Real-Time Systems.

Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, Des. Autom. Embed. Syst..

An open VHDL-AMS simulation framework

Manfred Glesner, Wolfgang Ecker, André Windisch, 2000, Proceedings 2000 IEEE/ACM International Workshop on Behavioral Modeling and Simulation.

Compact image compression using simplicial and ART neural systems with mixed signal implementations

Radu Dogaru, Manfred Glesner, Ioana Dogaru, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Sound signature analysis using time-frequency signal processing: Application to active stall avoidance in axial compressors

Manfred Glesner, Thomas Dombek, Thuyen Le, 1998, 9th European Signal Processing Conference (EUSIPCO 1998).

Influence of high-level synthesis on average and peak temperatures of CMOS circuits

Manfred Glesner, Marc Theisen, Burkart Voss, 2001 .

Rapid prototyping of an integrated testing and debugging unit

Manfred Glesner, Thomas Hollstein, Ralf Ludewig, 2004, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004..

Application of hierarchical mixture of experts networks to engine knock detection

Manfred Glesner, S. Ortmann, M. Rychetsky, 1997 .

Ein Beitrag zur automatischen Erzeugung dynamisch rekonfigurierbarer Hardwarestrukturen

Manfred Glesner, Peter Zipf, Yang Qiao, 2007, MBMV.

CAPpartx: Computer Aided Prototyping Partitioning for Xilinx FPGAs, a Hierarchical Partitioning Tool for Rapid Prototyping

Manfred Glesner, Hans-Jürgen Herpel, Ulrike Ober, 1996, FPL.

MCEMS Toolbox/spl minus/a hardware-in-the-loop simulation environment for mechatronic systems

Manfred Glesner, Michael Held, Hans-Jürgen Herpel, 1994, Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems.

A system-level simulation environment for system-on-chip design

Manfred Glesner, Wolfgang Ecker, Dieter Monjau, 2000, Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).

CONCEPTS FOR TEACHING NEW CIRCUIT TECHNIQUES

Manfred Glesner, Lukusa D. Kabulepa, Burkart Voss, 2000 .

An efficient filter bank architecture for the cross-term reduced processing of discrete time-frequency distributions

Manfred Glesner, Thuyen Le, 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

Adaptive architectures for an OTN processor: reducing design costs through reconfigurability and multiprocessing

Ulrich Heinkel, Manfred Glesner, Tudor Murgan, 2004, CF '04.

ALGIC—a silicon compiler system for digital signal processing

Manfred Glesner, N. Wehn, J. Schuck, 1988 .

Prototype Generation of Application-Specific Embedded Controllers for Microsystems

Manfred Glesner, Hans-Jürgen Herpel, Ulrike Ober, 1995, FPL.

Runtime Contention and Bandwidth-Aware Adaptive Routing Selection Strategies for Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2013, IEEE Transactions on Parallel and Distributed Systems.

Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint

Manfred Glesner, Sujan Pandey, 2006, 2006 43rd ACM/IEEE Design Automation Conference.

The simplicial neural cell and its mixed-signal circuit implementation: an efficient neural-network architecture for intelligent signal processing in portable multimedia applications

Leon O. Chua, Radu Dogaru, Manfred Glesner, 2002, IEEE Trans. Neural Networks.

Coarse-grained reconfiguration.

Jürgen Teich, Julio A. de Oliveira Filho, Wolfgang Rosenstiel, 2008, FPL 2008.

CONAN - a design exploration framework for reliable nano-electronics architectures

Yusuf Leblebici, Adrian M. Ionescu, Alexandre Schmid, 2005, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05).

Flexible Overhead Processing Architectures for G.709 Optical Transport Networks

Ulrich Heinkel, Manfred Glesner, Tudor Murgan, 2004, MBMV.

High-Level Synthesis and Test in the MOSCITO-Based Virtual Laboratory

Raimund Ubar, Jaan Raik, Manfred Glesner, 2002 .

Image coding with fuzzy region-growing segmentation

Manfred Glesner, Alexander Steudel, 1996, Proceedings of 3rd IEEE International Conference on Image Processing.

Specification of alternative execution semantics of UML sequence diagrams within actor-oriented models

Leandro Soares Indrusiak, Manfred Glesner, 2007, SBCCI '07.

Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit

Norbert Wehn, Manfred Glesner, Thomas Hollstein, 1995, FPL.

Proxy-based integration of reconfigurable hardware within simulation environments: improving e-learning experience in microelectronics

Leandro Soares Indrusiak, Manfred Glesner, Diego Fernando Jimenez Orostegui, 2005, 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05).

Dynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching

Jürgen Becker, Manfred Glesner, Tri Caohuu, 1999, FPL.

Multitasking Support for Dynamically Reconfig Urable Systems

Leandro Soares Indrusiak, Manfred Glesner, Peter Zipf, 2006, 2006 International Conference on Field Programmable Logic and Applications.

Eine Scheduling Heuristik zur Minimierung der Verlustleistung

Manfred Glesner, Peter Zipf, Thilo Pionteck, 2006, MBMV.

Lower bound on the accuracy of the CORDIC-based frequency offset compensation in burst oriented OFDM systems

Manfred Glesner, L. D. Kabulepa, T. Kella, 2001, IEEE 54th Vehicular Technology Conference. VTC Fall 2001. Proceedings (Cat. No.01CH37211).

A signal theory based approach to the statistical analysis of combinatorial nanoelectronic circuits

Manfred Glesner, Tudor Murgan, Peter Zipf, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Multidimensional defuzzification—fast algorithms for the determination of crisp characteristic subsets

Thomas A. Runkler, Manfred Glesner, 1995, SAC '95.

A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals

Manfred Glesner, Thomas Stiefmeier, Thilo Pionteck, 2004, FPL.

Defect Tolerance in a Wafer Scale Array for Image Processing

Manfred Glesner, E.-F. Kouka, P. A. Ivey, 1989 .

Computer-aided design of fuzzy systems based on generic VHDL specifications

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1996, IEEE Trans. Fuzzy Syst..

RF energy harvester design with autonomously adaptive impedance matching network based on auxiliary charge-pump rectifier

Manfred Glesner, Ping Zhao, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Advanced data preprocessing using fuzzy clustering techniques

Manfred Glesner, Harald Genther, 1997, Fuzzy Sets Syst..

An FPFA Implementation of a Magnetic Bearing Controller for Mechatronic Applications

Manfred Glesner, Jürgen Becker, Frank-Michael Renner, 1998, FPL.

Configurable VLSI Architecture of a General Purpose Lifting-based Wavelet Processor

Manfred Glesner, Andre Guntoro, Hans-Peter Keil, 2008, SIGMAP.

Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2005, Montpellier, France, June 2005

Leandro Soares Indrusiak, Lionel Torres, Manfred Glesner, 2005, ReCoSoC.

Applying Communication Patterns to Actor-Oriented Models

Leandro Soares Indrusiak, Manfred Glesner, Andreas Thuy, 2006, FDL.

A low-IF architecture for dual-standard GSM/UMTS fully integrated receivers

Manfred Glesner, Octavian Mitrea, Juan Jesús Ocampo Hidalgo, 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

Automatic imepdance matching in Microwave power harvesters

Manfred Glesner, Ping Zhao, Yuliang Zheng, 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics.

Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry

Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, 2006, PATMOS.

Transition activity estimation for generic data distributions

Manfred Glesner, Alberto Ortiz, Lukusa D. Kabulepa, 2002 .

A Versatile Cellular Neural Circuit Based on a Multi-nested Approach: Functional Capabilities and Applications

Radu Dogaru, Manfred Glesner, Cristian Chitu, 2003, VLSI-SOC.

Generation of a behavioural model of an acceleration sensor from its finite-element-description

Manfred Glesner, Bernard Courtois, J. M. Karam, 1996 .

Non-Linear Addressing Scheme for a Lookup-Based Transformation Function in a Reconfigurable Noise Generator

Leandro Soares Indrusiak, Manfred Glesner, Élvio Dutra, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Adaptable Image Processing System based on FPGA Modular Multi Kernel Instantiations

Leandro Soares Indrusiak, Manfred Glesner, Kurt Franz Ackermann, 2006, ReCoSoC.

An approach for multilevel logic cell optimization in module generators

Manfred Glesner, Peter Poechmueller, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

Design of an efficient OFDM burst synchronization scheme

Manfred Glesner, L. D. Kabulepa, A. Garcia Ortiz, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems

Jürgen Becker, Manfred Glesner, Frank-Michael Renner, 2000, Des. Autom. Embed. Syst..

Invited paper: Design criteria for dependable System-on-Chip architectures

Klaus Hofmann, Manfred Glesner, Thomas Hollstein, 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

Dynamically Reconfigurable Systems for Wireless Sensor Networks

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2010, Dynamically Reconfigurable Systems.

Embedded systems design for smart system integration

Manfred Glesner, François Philipp, 2013, 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Impeller integrated measurement of cavitation erosive aggressiveness

Manfred Glesner, Bernd Stoffel, Burkart Voss, 2000 .

Providing Flexible Internet Infrastructure for FPGA-Based CAD Courses

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Reis, 2000 .

High-Speed Configurable VLSI Architecture of a General Purpose Lifting-Based Discrete Wavelet Processor

Manfred Glesner, Andre Guntoro, Hans-Peter Keil, 2008, ICETE.

Perspectives of reconfigurable computing in education

Manfred Glesner, Jürgen Becker, F.-M. Renner, 1998 .

CAD and foundries for microsystems

Márta Rencz, Klaus Hofmann, Manfred Glesner, 1997, DAC.

Synthesis of complex VHDL operators

Norbert Wehn, Manfred Glesner, Michael Gasteier, 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

Neue Entwurfsverfahren beim System-on-Chip-Design

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005 .

Ubiquitous access to reconfigurable hardware: application scenarios and implementation issues

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

Process variations aware robust on-chip bus architecture synthesis for MPSoCs

Rolf Drechsler, Manfred Glesner, Tudor Murgan, 2008, 2008 IEEE International Symposium on Circuits and Systems.

DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications

Jürgen Becker, Manfred Glesner, Thilo Pionteck, 2000, FPL.

An FPGA implementation of the AES-Rijndael in OCB/ECB modes of operation

Manfred Glesner, Cristian Chitu, 2005, Microelectron. J..

Flexible Wormhole-Switched Network-on-chip with Two-Level Priority Data Delivery Service

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2009 .

A VLSI friendly image compression algorithm based on fuzzy-ART neural network

Radu Dogaru, Manfred Glesner, A. T. Murgan, 1996 .

Multiway netlist partitioning onto FPGA-based board architectures

Manfred Glesner, Ulrike Ober, 1995, Proceedings of EURO-DAC. European Design Automation Conference.

Flexible Multiplexing in MPEG-4 Systems

Ulrich Mayer, Manfred Glesner, Jürgen Deicke, 1998, IDMS.

HiPART: a new hierarchical semi-interactive HW-/SW partitioning approach with fast debugging for real-time embedded systems

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 1998, Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98).

Accurate capture of timing parameters in inductively-coupled on-chip interconnects

Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, 2004, Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784).

Modeling and prototyping of communication systems using Java: a case study

Leandro Soares Indrusiak, Manfred Glesner, Romualdo Begale Prudêncio, 2005, 16th IEEE International Workshop on Rapid System Prototyping (RSP'05).

Design and test of MEMS

Márta Rencz, Klaus Hofmann, Salvador Mir, 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Oldenburg, Germany, February 21-23, 2011

Jürgen Teich, Wolfgang Rosenstiel, Wolfgang Nebel, 2011, MBMV.

A model-based development approach for multi-cavity RF control systems

Manfred Glesner, Peter Zipf, Pongyupinpanich Surapong, 2009 .

Analysis and design of a 4th order bandpass sigma delta modulator for GSM communications standard

Manfred Glesner, Alberto Ortiz, Lukusa D. Kabulepa, 2002 .

Statistical tolerance investigations on electrical networks by the generalized quantile arithmetic

Manfred Glesner, K Haubrichs, H. J. Linsler, 1978 .

A design methodology for the conceptual design of application specific digital processors in mechatronic systems

Manfred Glesner, Michael Held, Hans-Jürgen Herpel, 1994, 1994 Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences.

Automatic transfer of parametric FEM models into CAD-layout formats for top-down design of microsystems

Manfred Glesner, M. Lang, D. David, 1997, Proceedings European Design and Test Conference. ED & TC 97.

Fuzzy neural fusion techniques for industrial applications

Manfred Glesner, Saman K. Halgamuge, 1994, SAC '94.

Systematic Methods for Multivariate Data Visualization and Numerical Assessment of Class Separability and Overlap in Automated Visual Industrial Quality Control

Manfred Glesner, Andreas König, Olaf Bulmahn, 1994, BMVC.

Switching Activity Estimation in Non-linear Architectures

Alberto García Ortiz, Manfred Glesner, Lukusa D. Kabulepa, 2003, PATMOS.

Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique

Manfred Glesner, Sujan Pandey, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Parallel Hardware Compilation in Complex Hardware/Software Systems based on High-Level Code Transformations

Jürgen Becker, Manfred Glesner, Marc Theisen, 1999, ARCS.

Architecture and application of a dynamically reconfigurable hardware array for future mobile communication systems

Jürgen Becker, Manfred Glesner, Janusz A. Starzyk, 2000, Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871).

Wormhole cut-through switching: Flit-level messages interleaving for virtual-channelless network-on-chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2011, Microprocess. Microsystems.

Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation

Manfred Glesner, Massoud Momeni, Petru Bogdan Bacinschi, 2008, 2008 Design, Automation and Test in Europe.

Power estimation based on transition activity analysis with an architecture precise rapid prototyping system

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2002, Proceedings 13th IEEE International Workshop on Rapid System Prototyping.

Design and implementation of a coarse-grained dynamically reconfigurable hardware architecture

Jürgen Becker, Manfred Glesner, Thilo Pionteck, 2001, Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems.

Handling FPGA Faults and Configuration Sequencing Using a Hardware Extension

Manfred Glesner, Peter Zipf, Hans Wojtkowiak, 2002, FPL.

Analog HDL representation of active filters and noise effects

Manfred Glesner, T. Niculiu, A. Manolescu, 1995, 1995 International Semiconductor Conference. CAS '95 Proceedings.

Rapid prototyping in microsystems development

Wilfried Jakob, Manfred Glesner, Horst Eggert, 1995, Proceedings Sixth IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype.

Real-Time System Prototyping Based on a Heterogeneous Multi-Processor Environment

Manfred Glesner, Michael Held, Hans-Jürgen Herpel, 1993, Fifth Euromicro Workshop on Real-Time Systems.

Rapid prototyping of a co-processor based engine knock detection system

Manfred Glesner, Stefan Ortmann, Andreas Kirschbaum, 1998, Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237).

A flexible floating-point wavelet transform and wavelet packet processor

Manfred Glesner, Andre Guntoro, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

Automatic generation of application specific fuzzy controllers for rapid-prototyping

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

A metric for the energy-efficiency of dynamically reconfigurable systems

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2006, ARCS Workshops.

Integration monolithischer CMOS Schaltungen für Mobilfunkanwendungen : Entwurfsmethoden und Herausforderungen

Manfred Glesner, Peter Zipf, Thilo Pionteck, 2002 .

Towards a unique FPGA-based identification circuit using process variations

Philip Heng Wai Leong, Manfred Glesner, Haile Yu, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Einsatz von Rapid Prototyping bei der Realisierung eines ASICs zur dynamischen Volumenstrommessung in hydraulischen Systemen

Manfred Glesner, H.-J. Herpel, B. Stoffel, 1993 .

Medizinische Gewebeanalyse mittels neuronaler Strukturen

Manfred Glesner, Stefan Ortmann, M. Rychetsky, 1996 .

Field Programmable Communication Emulation and Optimization for Embedded System Design

Jürgen Becker, Manfred Glesner, Frank-Michael Renner, 2000, FPL.

High-level abstraction for teaching smart systems design with modular hardware

Manfred Glesner, Francois Philipp, 2014, 10th European Workshop on Microelectronics Education (EWME).

Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs

Leandro Soares Indrusiak, Fernando Gehm Moraes, Manfred Glesner, 2012, 2012 International Symposium on System on Chip (SoC).

Handwritten pattern recognition with a binary associative memory

Manfred Glesner, Werner Pöchmüller, 1990, 1990 IJCNN International Joint Conference on Neural Networks.

Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design)

Manfred Glesner, Wolfgang Ecker, Dieter Monjau, 2000, Informationstechnik Tech. Inform..

Generating compilers for generated datapaths

Manfred Glesner, Michael Held, 1994, EURO-DAC '94.

A flexible and approximate computing approach for time-frequency distributions

Manfred Glesner, Thuyen Le, M. Glesner, 2000, IEEE Trans. Signal Process..

Entwurf eines systolischen Arrays in Wafer Scale Technik für die digitale Signalverarbeitung

Gabriele Saucier, Manfred Glesner, Peter A. Ivey, 1988, GI Jahrestagung.

A Parallel Dynamically Reconfigurable Architecture Designed for Flexible Application-Tailored Hardware/Software Systems in Future Mobile Communication

Jürgen Becker, Manfred Glesner, 2004, The Journal of Supercomputing.

Multicast Parallel Pipeline Router Architecture for Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2008, 2008 Design, Automation and Test in Europe.

A power-constrained design strategy for CMOS tuned low noise amplifiers

Manfred Glesner, Oliver Mitea, 2004, Microelectron. Reliab..

System design challenge s in the nanoscale era

Manfred Glesner, Tudor Murgan, Peter Zipf, 2007 .

Analysis and Architectural Study of a Hybrid ASIC/Configurable State Machine Model

Manfred Glesner, Peter Zipf, Claude Stötzler, 2005, ReCoSoC.

A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support

Manfred Glesner, Andreas Reinhardt, Heiko Hinkelmann, 2008, 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping.

Reconfigurable platforms for ubiquitous computing

Leandro Soares Indrusiak, Manfred Glesner, Tudor Murgan, 2004, CF '04.

A sub Bayesian nearest prototype neural network with fuzzy interpretability for diagnosis problems

Manfred Glesner, Saman K. Halgamuge, Christoph Grimm, 1995, SAC '95.

SPP1148 booth: Coarse-grained reconfiguration

Jürgen Teich, Julio A. de Oliveira Filho, Wolfgang Rosenstiel, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Application-specific microelectronics for mechatronic systems

Manfred Glesner, Hans-Jürgen Herpel, A. Laudenbach, 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

Implementation of Realtime and Highspeed Phase Detector on FPGA

Manfred Glesner, Peter Zipf, Martin Kumm, 2006, ARC.

Investigation of voltage-controlled oscillator circuits using organic thin-film transistors (OTFT) for use in VCO-based analog-to-digital converters

Manfred Glesner, Ramkumar Ganesan, Jürgen Krumm, 2014 .

VLSI-SOC: From Systems to Chips - IFIP TC 10/ WG 10.5 Twelfth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2003), December 1-3, 2003, Darmstadt, Germany

Manfred Glesner, 2006, VLSI-SoC.

Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2012, Microprocess. Microsystems.

Enabling self-reconfiguration on a video processing platform

Leandro Soares Indrusiak, Manfred Glesner, Kurt Franz Ackermann, 2008, 2008 International Symposium on Industrial Embedded Systems.

Mechanisms and Architecture for the Dynamic Reconfiguration of an Advanced Wireless Sensor Node

Manfred Glesner, François Philipp, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

MPEG-4 PC - Authoring and Playing of MPEG-4 Content for Local and Broadcast Applications

Ulrich Mayer, Manfred Glesner, Franco Casalino, 1999, ECMAST.

Bandwidth Requirement Determination for a Digitally Controlled Cavity Synchronisation in a Heavy Ion Synchrotron Using Ptolemy II

Manfred Glesner, Peter Zipf, Harald Klingbeil, 2008, 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping.

Fuzzy rule based data analysis using methods of computational intelligence

Manfred Glesner, Saman K. Halgamuge, H. Genther, 1995, Proceedings of 3rd International Symposium on Uncertainty Modeling and Analysis and Annual Conference of the North American Fuzzy Information Processing Society.

Applied design and analysis of microsystems

Márta Rencz, Klaus Hofmann, Manfred Glesner, 1996, Proceedings ED&TC European Design and Test Conference.

Distributed Collaborative Design over Cave2 Framework

Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, 2001, VLSI-SOC.

An alternative approach for generation of membership functions and fuzzy rules based on radial and cubic basis function networks

Manfred Glesner, Saman K. Halgamuge, Werner Pöchmüller, 1995, Int. J. Approx. Reason..

New Theory for Deadlock-Free Multicast Routing in Wormhole-Switched Virtual-Channelless Networks-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2011, IEEE Transactions on Parallel and Distributed Systems.

VLSI-implementation of associative memory systems for neural information processing

Manfred Glesner, Andreas König, 1995 .

Design of an organic electronic label on a flexible substrate for temperature sensing

Manfred Glesner, Sebastian Pankalla, Ramkumar Ganesan, 2013, 2013 Proceedings of the ESSCIRC (ESSCIRC).

Tabu Search Based On-Chip Communication Bus Synthesis for Shared Multi-Bus Based Architecture

Manfred Glesner, Sujan Pandey, Nurten Utlu, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Pipelined Floating-Point Architecture for a Phase and Magnitude Detector Based on CORDIC

Manfred Glesner, Surapong Pongyupinpanich, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

Hardware evaluation of low power communication mechanisms for transport-triggered architectures

Manfred Glesner, Lukusa D. Kabulepa, Thilo Pionteck, 2003, 14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings..

(GECO)2: A graphical tool for the generation of configuration bitstreams for a smart sensor interface based on a Coarse-Grained Dynamically Reconfigurable Architecture

Manfred Glesner, François Philipp, 2012, 22nd International Conference on Field Programmable Logic and Applications (FPL).

Prozessorintegration und Speicheranbindung dynamisch rekonfigurierbarer Funktionseinheiten

Manfred Glesner, Oliver Kleine, Thilo Pionteck, 2005, ARCS Workshops.

An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs

Klaus Koch, Manfred Glesner, Tudor Murgan, 2008, 2008 Design, Automation and Test in Europe.

Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures

Jürgen Becker, Manfred Glesner, Thilo Pionteck, 2001, FPL.

A defect-tolerant and fully testable PLA

Norbert Wehn, Manfred Glesner, A. Roth, 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

Support vector approaches for engine knock detection

Manfred Glesner, Matthias Rychetsky, Stefan Ortmann, 1999, IJCNN'99. International Joint Conference on Neural Networks. Proceedings (Cat. No.99CH36339).

SPP1148 booth: Application-specific reconfigurable processors

Norbert Wehn, Manfred Glesner, Peter Zipf, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Evaluating the impact of communication latency on applications running over on-chip multiprocessing platforms: A layered approach

Leandro Soares Indrusiak, Fernando Gehm Moraes, Jari Nurmi, 2010, 2010 8th IEEE International Conference on Industrial Informatics.

Fuzzy neural networks: between functional equivalence and applicability

Manfred Glesner, Saman K. Halgamuge, 1995, Int. J. Neural Syst..

Hardware accelerated estimation of multiplexer-introduced loss for MPEG-4 data streams

Ulrich Mayer, Manfred Glesner, 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

Run-time monitoring of communication activities in a rapid prototyping environment

Jürgen Becker, Manfred Glesner, Andreas Kirschbaum, 1998, Proceedings. Ninth International Workshop on Rapid System Prototyping (Cat. No.98TB100237).

An Asynchronous Switch Implmentation for Systems-on-a-Chip

Manfred Glesner, Peter Zipf, Thomas Hollstein, 2004, MBMV.

Concept of a joint university/industry course for mixed-signal system-on-chip design

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 2001, Proceedings 2001 International Conference on Microelectronic Systems Education.

Design and evaluation of an energy-efficient dynamically reconfigurable architecture for wireless sensor nodes

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Average bit transition for non zero-mean signals in DSP architectures

Manfred Glesner, Alberto Garcia-Ortiz, 2001 .

Estimation of multiplexer-introduced loss for MPEG-4 data streams connected to (R)CBR channels

Ulrich Mayer, Manfred Glesner, Jürgen Deicke, 2000, Proceedings ISCC 2000. Fifth IEEE Symposium on Computers and Communications.

Low-Power Coding for Networks-on-Chip with Virtual Channels

Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, 2009, J. Low Power Electron..

System Level Design of a Dynamically Self-Reconfigurable Image Processing System

Leandro Soares Indrusiak, Manfred Glesner, Kurt Franz Ackermann, 2007, ReCoSoC.

Hardware acceleration of combined cipher and forward error correction for low-power wireless applications

Manfred Glesner, Francois Philipp, Conrad Klytta, 2012, 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC).

A VLSI implementation of a state variable filter algorithm

Manfred Glesner, Hans-Jürgen Herpel, Peter Windirsch, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

A Domain-Specific Dynamically Reconfigurable Hardware Platform for Wireless Sensor Networks

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2007, 2007 International Conference on Field-Programmable Technology.

Eine weiterentwickelte quasi-statische adiabatische Logikfamilie

Manfred Glesner, Clemens Schlachta, Peter Zipf, 2005, GI Jahrestagung.

IP-based Application Mapping Techniques for Dynamically Reconfigurable Hardware Architectures

Jürgen Becker, Manfred Glesner, 2000, PDPTA.

SCAT - A New Statistical Timing Verifier in a Silicon Compiler System

Manfred Glesner, Johannes Schuck, R. B. Steck, 1986, 23rd ACM/IEEE Design Automation Conference.

HW/SW design and realization of a size-reconfigurable DCT accelerator

Manfred Glesner, Tudor Murgan, Abdulfattah Mohammad Obeid, 2005, 2005 12th IEEE International Conference on Electronics, Circuits and Systems.

Regularization of hierarchical VHDL-AMS models using bipartite graphs

Manfred Glesner, Jochen Mades, 2002, DAC '02.

Analysis on power harvesting circuits with tunable matching network for improved efficiency

Manfred Glesner, Ping Zhao, Thomas Hollstein, 2009, 2009 Ph.D. Research in Microelectronics and Electronics.

An infrastructure for distributed computing and context aware computing

Max Mühlhäuser, Manfred Glesner, Tudor Murgan, 2003 .

An Adaptive Trace-Back Solution for State-Parallel Viterbi Decoders

Manfred Glesner, Tudor Murgan, Mihail Petrov, 2003, VLSI-SOC.

Um Framework de Apoio à Colaboração no Projeto Distribuído de Sistemas Integrados

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, 2004, RITA.

High-level synthesis in a rapid-prototype environment for mechatronic systems

Norbert Wehn, Manfred Glesner, Thomas Hollstein, 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

An Actor-Oriented Group Mobility Model for Wireless Ad Hoc Sensor Networks

Leandro Soares Indrusiak, Manfred Glesner, Enkhbold Ochirsuren, 2008, 2008 The 28th International Conference on Distributed Computing Systems Workshops.

PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels

Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, 2008, PATMOS.

Cascade delta-sigma modulator with pseudo-differential comparator-based switched-capacitor gain stage

Manfred Glesner, Bogomir Horvat, Massoud Momeni, 2007 .

An efficient hardware implementation of a self-adaptable equalizer for WCDMA downlink UMTS standard

Leandro Soares Indrusiak, Manfred Glesner, Romualdo Begale Prudencio, 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

IVE: an Internet based distributed VHDL environment

Manfred Glesner, W. Ecke, J. Mades, 2000, Proceedings of 13th Annual IEEE International ASIC/SOC Conference (Cat. No.00TH8541).

Generation of interconnect topologies for communication synthesis

Manfred Glesner, Michael Gasteier, Michael Münch, 1998, Proceedings Design, Automation and Test in Europe.

Model-based analysis of digital signal processing blocks in a beam phase control system

Manfred Glesner, Harald Klingbeil, Christopher Spies, 2012 .

Defuzzification As Crisp Decision Under Fuzzy Constraints — New Aspects of Theory and Improved Defuzzification Algorithms

Manfred Glesner, T. A. Runkler, 1994 .

Moment-power estimation in very deep submicron technologies

Manfred Glesner, Tudor Murgan, Alberto Ortiz, 2003 .

Collaborative learning by sharing design experience

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Reis, 2002 .

Fly - A Modifiable Hardware Compiler

Philip Heng Wai Leong, Alberto García Ortiz, Manfred Glesner, 2002, FPL.

An Interleaving Switch-based Crossbar Architecture for MP SoC on FPGA

Manfred Glesner, S. Pongyupinpanich, S. Singhaniyom, 2010, ECTI-CON2010: The 2010 ECTI International Confernce on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology.

Hardware in-the-loop simulation-a rapid prototyping approach for designing mechatronics systems

Manfred Glesner, Frank-Michael Renner, T. Le, 1997, Proceedings 8th IEEE International Workshop on Rapid System Prototyping Shortening the Path from Specification to Prototype.

Towards an Automated Design of Application-specific Reconfigurable Logic

Manfred Glesner, Peter Zipf, 2006, Dynamically Reconfigurable Architectures.

Flexible architectures for DCT of variable-length targeting shape-adaptive transform

Manfred Glesner, Thuyen Le, 2000, IEEE Trans. Circuits Syst. Video Technol..

Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications

Wayne Luk, Manfred Glesner, Peter Y. K. Cheung, 1995 .

Power consumption in point-to-point interconnect architectures

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2002, Proceedings. 15th Symposium on Integrated Circuits and Systems Design.

On the design of reconfigurable multipliers for integer and Galois field multiplication

Manfred Glesner, Peter Zipf, Jia Li, 2009, Microprocess. Microsystems.

A data-driven scheme for the approximated computing of alias-free generalized discrete time-frequency distributions

Manfred Glesner, Thuyen Le, 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).

An approach to the stall monitoring in a single stage axial compressor

Manfred Glesner, Dietmar K. Hennecke, H. Wang, 1993 .

Adiabatic charging of long interconnects

Manfred Glesner, Burkart Voss, 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).

Erratum to Planar adaptive network-on-chip supporting deadlock-free and efficient tree-based multicast routing method Microprocessors and Microsystems (2012) 449-461

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2012, Microprocess. Microsystems.

Einsatz und Beurteilung von Neuro-Fuzzy-Methoden in der Umweltwissenschaft

Manfred Glesner, Manfred W. Ostrowski, Marc Theisen, 1997 .

An integrated tool flow to realize runtime-reconfigurable applications on a new class of partial multi-context FPGAs

Manfred Glesner, Peter Zipf, Markus Rullmann, 2009, 2009 International Conference on Field Programmable Logic and Applications.

Evaluation of state-of-the-art neural network customized hardware

Manfred Glesner, Werner Pöchmüller, M. Glesner, 1991, Neurocomputing.

Wideband ESD-protected CMOS LNA

Manfred Glesner, Octavian Mitrea, 2002 .

HADES-high-level architecture development and exploration system

Norbert Wehn, Manfred Glesner, Michael Held, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

A scalable reconfiguration mechanism for fast dynamic reconfiguration

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2008, 2008 International Conference on Field-Programmable Technology.

Design methodology of application specific integrated circuits for mechatronic systems

Manfred Glesner, Richard Markert, F.-M. Renner, 2000, Microprocess. Microsystems.

Simultaneous Placement and Buffer Planning for Reduction of Power Consumption in Interconnects and Repeaters

Manfred Glesner, Tudor Murgan, Sujan Pandey, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

Entwicklung und Realisierung eines neuronalen Klopfdetektors unter Verwendung von konstruktiven Lernmethoden

Manfred Glesner, S. Ortmann, 1997 .

A CAD tool for designing large, fault-tolerant VLSI arrays

Manfred Glesner, G. K. Sharma, Peter Poechmueller, 1991, [1991] Proceedings. First Great Lakes Symposium on VLSI.

Simulation and rapid prototyping of flexible systems-on-a-chip for future mobile communication applications

Jürgen Becker, Manfred Glesner, Lukusa D. Kabulepa, 2000, Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668).

Hardware-efficient detection and correction of timing offsets in OFDM-based WLANs

Manfred Glesner, Alberto Ortiz, Thilo Pionteck, 2003 .

RAMSES-a rapid prototyping environment for embedded control applications

Norbert Wehn, Manfred Glesner, Hans-Jürgen Herpel, 1991, [1991 Proceedings] The Second International Workshop on Rapid System Prototyping.

Estimation of power consumption in encoded data buses

Alberto García Ortiz, Manfred Glesner, Lukusa D. Kabulepa, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Flexible parallel pipeline network-on-chip based on dynamic packet identity management

Manfred Glesner, Thomas Hollstein, Faizal Arya Samman, 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

Lookup-based Remote Laboratory for FPGA Digital Design Prototyping

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, 2004, VIRTUAL-LAB.

A VLSI System Design for the Control of High Performance Combustion Engines

Norbert Wehn, Manfred Glesner, A. Laudenbach, 1991, VLSI.

Modelling of sensors and actuators: a system approach

Klaus Hofmann, Manfred Glesner, 1995 .

Design Concepts for a Dynamically ReconfigurableWireless Sensor Node

Manfred Glesner, Peter Zipf, Heiko Hinkelmann, 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

Robustness against circuit nonidealities: Comparative study of bandpass sigma-delta modulators

Manfred Glesner, Alberto Ortiz, Juan Jesus Ocampo Hidalgo, 2002 .

Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers

Leandro Soares Indrusiak, Fernando Gehm Moraes, Manfred Glesner, 2010, 2010 International Conference on Field Programmable Logic and Applications.

A new flexible architecture for variable length DCT targeting shape-adaptive transform

Manfred Glesner, Thuyen Le, 1999, 1999 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings. ICASSP99 (Cat. No.99CH36258).

Field-Programmable Logic and Applications 7th International Workshop, Fpl '97, London, Uk, September 1-3, 1997 : Proceedings'

Wayne Luk, Manfred Glesner, Peter Y. K. Cheung, 1997 .

A hierarchical hybrid fuzzy controller for real-time reverse driving support of vehicles with long trailers

Manfred Glesner, Saman K. Halgamuge, T. A. Runkler, 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework

Leandro Soares Indrusiak, Fernando Gehm Moraes, Manfred Glesner, 2011, SBCCI '11.

Emulation of analog components for the rapid prototyping of wireless baseband systems

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2003, 14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings..

Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes

Leandro Soares Indrusiak, Fernando Gehm Moraes, Ricardo Reis, 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

A Scalable Resampling Architecture

Manfred Glesner, Mihail Petrov, 2007, IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference.

High-performance floating-point VLSI architecture of lifting-based forward and inverse wavelet transforms

Manfred Glesner, Andre Guntoro, Massoud Momeni, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

A New Approach for Designing Fault-Tolerant Array Processors

Manfred Glesner, Peter Poechmueller, 1991, Fault-Tolerant Computing Systems.

Fast Perceptron Learning by Fuzzy Controlled Dynamic Adaptation of Network Parameters

Manfred Glesner, Saman Kumara Halgamuge, Andreas Mari, 1994 .

VLSI-SoC: An Enduring Tradition

Ricardo Reis, Manfred Glesner, 2017, VLSI-SoC.

Energy Conscious Simultaneous Voltage Scaling and On-chip Communication Bus Synthesis

Manfred Glesner, Tudor Murgan, Sujan Pandey, 2006, 2006 IFIP International Conference on Very Large Scale Integration.

On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems

Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner, 2007, IEEE Transactions on Industrial Electronics.

Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren

Manfred Glesner, Thomas Stiefmeier, Thilo Pionteck, 2004, ARCS Workshops.

IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003

Leandro Soares Indrusiak, Hans Eveking, Manfred Glesner, 2003, VLSI-SoC.

Fuzzy segmented image coding using orthonormal bases and derivative chain coding

Manfred Glesner, Alexander Steudel, 1999, Pattern Recognit..

A client/server application as an example for MPEG-4 systems

Ulrich Mayer, Manfred Glesner, Jürgen Deicke, 1998, Comput. Commun..

A linear model for high-level delay estimation in VDSM on-chip interconnects

Alberto García Ortiz, Manfred Glesner, Tudor Murgan, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Generation of the HDL-A-model of a micromembrane from its finite-element-description

Nicu Sebe, Klaus Hofmann, Manfred Glesner, 1997, Proceedings European Design and Test Conference. ED & TC 97.

Comparison of a heuristic method with a genetic algorithm for generation of compact rule based classifiers

Manfred Glesner, Saman K. Halgamuge, Alain Brichard, 1995, SAC '95.

A fast and compact classifier based on sorting in an iteratively expanded input space

Radu Dogaru, Manfred Glesner, 2008, Int. J. Intell. Syst..

Application-specific reconfigurable processors.

Norbert Wehn, Manfred Glesner, Peter Zipf, 2008, FPL 2008.

Entwurfsverfahren für eingebettete Hardware/Software Systems-on-Chip

Manfred Glesner, Thomas Hollstein, R. Ludewig, 2002 .

A novel leakage-estimation method for input-vector control

Alberto García Ortiz, Manfred Glesner, Andre Guntoro, 2008, APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems.

Comparative analysis and application of data repository infrastructure for collaboration-enabled distributed design environments

Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

Constructive Learning of a Sub-Feature Detector Network by Means of Prediction Risk Estimation

Manfred Glesner, Matthias Rychetsky, Stefan Ortmann, 1998, NC.

A new approach to timing driven partitioning of combinational logic

Norbert Wehn, Manfred Glesner, N. Wehn, 1991, Euro ASIC '91.

A Framework for Teaching (Re)Configurable Architectures in Student Projects

Manfred Glesner, Peter Zipf, Thilo Pionteck, 2002, FPL.

Adaptive systems-on-chip: architectures, technologies and applications

Jürgen Becker, Manfred Glesner, Thilo Pionteck, 2001, Symposium on Integrated Circuits and Systems Design.

Rapid-Prototyping von anwendungsspezifischen Fuzzy Controllern mit Field Programmable Gate Arrays

Manfred Glesner, Saman K. Halgamuge, Thomas Hollstein, 1994, Fuzzy Days.

An Integrated Model Bridging the Gap between Technology and Economy

Manfred Glesner, Peter Zipf, Stephan Bingemer, 2003, VLSI-SOC.

Estimating lower hardware bounds in high-level synthesis

Norbert Wehn, Manfred Glesner, C. Vielhauer, 1993, VLSI.

Object-oriented Specification Approach for Synthesis of Hardware-/Software Systems

Jürgen Becker, Manfred Glesner, Thomas Hollstein, 1999, MBMV.

A dynamically reconfigurable system-on-a-chip architecture for future mobile digital signal processing

Jürgen Becker, Manfred Glesner, Janusz A. Starzyk, 2000, 2000 10th European Signal Processing Conference.

Deadlock-free routing and component placement for irregular mesh-based networks-on-chip

Manfred Glesner, Heiko Zimmer, Thomas Hollstein, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

A DOMAIN-SPECIFICDYNAMICALLY RECONFIGURABLEHARDWARE PLATFORM FOR WIRELESSSENSORNETWORKS

Manfred Glesner, Peter Zipf, 2007 .

A prototyping environment for fuzzy controllers

Manfred Glesner, Thomas Hollstein, Andreas Kirschbaum, 1997, FPL.

Design of a reconfigurable AES encryption/decryption engine for mobile terminals

Manfred Glesner, Thomas Stiefmeier, Thilo Pionteck, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

Application- Specific Micro electronics for Mechat ronic Systems *

Manfred Glesner, A. Laudenbach, P. Windirsch, 1992 .

A simplified executable model to evaluate latency and throughput of networks-on-chip

Leandro Soares Indrusiak, Fernando Gehm Moraes, Jari Nurmi, 2008, SBCCI '08.

Linearization technique for a CMOS active resistor

Manfred Glesner, Anca Manolescu, Cosmin Popa, 2002 .

Limiting factors of future development of CMOS technology - an overview

Manfred Glesner, Burkart Voss, 1997 .

TinyOS Extensions for a Wireless Sensor Network Node Based on a Dynamically Reconfigurable Processor

Leandro Soares Indrusiak, Manfred Glesner, Heiko Hinkelmann, 2008, DIPES.

Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content

Leandro Soares Indrusiak, Ralf Steinmetz, Manfred Glesner, 2003, MSE.

Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems

Jürgen Becker, Manfred Glesner, Frank-Michael Renner, 1999, Proceedings Tenth IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype (Cat. No.PR00246).

Reconfigurable Embedded Systems: An Application-Oriented Perspective on Architectures and Design Techniques

Leandro Soares Indrusiak, Manfred Glesner, Tudor Murgan, 2005, SAMOS.

Analysis of the mobility of printed organic p-channel transistors depending on the transistor geometry and orientation

Manfred Glesner, Sebastian Pankalla, Dieter Spiehl, 2012 .

Threshold Voltage and Mobility Fluctuations of Printed Organic Transistors

Manfred Glesner, Edgar Dörsam, Sebastian Pankalla, 2011 .

Planar Adaptive Router Microarchitecture for Tree-Based Multicast Network-on-Chip

Manfred Glesner, Thomas Hollstein, Faizal A. Samman, 2008 .

Efficient algorithms for high resolution fuzzy controllers with piecewise linearities

Manfred Glesner, T. A. Runkler, 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

Two Neural Models for fast Category Learning — Neural Associative Memories and the Restricted Coulomb Energy Model

Franz Quint, Manfred Glesner, Andreas König, 1993 .