Dae Woo Lee

Predictive model of a reduced surface field p-LDMOSFET using neural network

Tae Moon Roh, Byunghwhan Kim, Sungmo Kim, 2004 .

FPGA based HW/SW co-design for vision based real-time position measurement of an UAV

Young Sik Kim, Ji Hoon Park, Dae Woo Lee, 2016 .

Power-aware 32Bit SIMSD Path Architecture Using Single/Parallel Mode Bit and 2 Step Gating Technique

Jongdae Kim, Yil Suk Yang, Dae Woo Lee, 2007 .

A Serial Input/Output Circuit with 8 bit and 16 bit Selection Modes

Tae Moon Roh, Jongdae Kim, Jin Gun Koo, 2002 .

Design of an FPGA-Based RTL-Level CAN IP Using Functional Simulation for FCC of a Small UAV System

Young Sik Kim, Dae Woo Lee, Dong In Han, 2017 .