T. Tsutsumi

发表

Measurement of Vth variation due to STI stress and inverse narrow channel effect at ultra-low voltage in a variability-suppressed process

T. Sekigawa, Y. Ogasahara, T. Nakagawa, 2015, Proceedings of the 2015 International Conference on Microelectronic Test Structures.

Compact model for ultra-short channel four-terminal DG MOSFETs for exploring circuit characteristics

Masakazu Hioki, Tadashi Nakagawa, Eiichi Suzuki, 2005 .

Primary Consideration on Compact Modeling of DG MOSFETs with Four-terminal Operation Mode

E. Suzuki, T. Sekigawa, T. Nakagawa, 2003 .

Improved Compact Model for Four-Terminal DG MOSFETs

E. Suzuki, T. Sekigawa, T. Nakagawa, 2004 .

Highly suppressed short-channel effects in ultrathin SOI n-MOSFETs

Hiroshi Hiroshima, Kenichi Ishii, Toshiyuki Tsutsumi, 2000 .

Backscattered Electrons from a Drain Region in a Silicon Decanano Diode

K. Tomizawa, T. Tsutsumi, 2007 .

Analysis of backscattering phenomenon from drain region in a silicon nanodiode

K. Tomizawa, T. Tsutsumi, 2005, Digest of Papers Microprocesses and Nanotechnology 2005.

Fin-Type Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistors Fabricated by Orientation-Dependent Etching and Electron Beam Lithography

Kenichi Ishii, H. Takashima, Toshiyuki Tsutsumi, 2003 .

Plane-view observation technique of silicon nanowires by transmission electron microscopy

E. Suzuki, K. Ishii, K. Tomizawa, 1999 .

Study of threshold voltage fluctuation caused by source and drain extensions doping variation of tri-gate fin-type FET using three-dimensional device simulation

T. Tsutsumi, Jaeyup Lee, 2014 .

Spectroscopic Ellipsometry for the Characterization of the Morphology of Ultra-thin Thermal CVD Amorphous and Nanocrystalline Silicon Thin Films

E. Suzuki, Hirohisa Taguchi, M. Yamanaka, 2000 .

Cross-Sectional Channel Shape Dependence of Short-Channel Effects in Fin-Type Double-Gate Metal Oxide Semiconductor Field-Effect Transistors

E. Suzuki, K. Ishii, M. Masahara, 2004 .

Analysis of channel electrons scattered in each region of silicon nanodiode at low drain voltage using nonequilibrium Green’s function approach

K. Tomizawa, T. Tsutsumi, 2014 .

Single electron memory characteristic of silicon nanodot nanowire transistor

Hiroshi Hiroshima, Kenichi Ishii, Toshiyuki Tsutsumi, 2000 .

Systematic electrical characteristics of ideal rectangular cross section Si-Fin channel double-gate MOSFETs fabricated by a wet process

Hiromi Yamauchi, Kunihiro Sakamoto, Kenichi Ishii, 2003 .

More than an order of magnitude energy improvement of FPGA by combining 0.4V operation and Multi-Vt optimization of 20k body bias domains

Yasuhiro Ogasahara, Chao Ma, Toshiyuki Tsutsumi, 2014, 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability

Yasuhiro Ogasahara, Chao Ma, Toshiyuki Tsutsumi, 2014 .

Fully-functional FPGA prototype with fine-grain programmable body biasing

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2013, FPGA '13.

Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2007, IEICE Trans. Inf. Syst..

Optimal set of body bias voltages for an FPGA with field-programmable V/sub th/ components

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Evaluation of granularity on threshold voltage control in flex power FPGA

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Flexible threshold voltage FinFETs with independent double gates and an ideal rectangular cross-section Si-Fin channel

H. Yamauchi, M. Masahara, H. Takashima, 2003, IEEE International Electron Devices Meeting 2003.

Close Observation of the Geometrical Features of an Ultranarrow Silicon Nanowire Device

E. Suzuki, K. Ishii, K. Tomizawa, 2002 .

Electrical and geometrical properties of a Si quantum nanowire device fabricated by an inorganic EB resist process

E. Suzuki, K. Ishii, K. Tomizawa, 2001, Digest of Papers. Microprocesses and Nanotechnology 2001. 2001 International Microprocesses and Nanotechnology Conference (IEEE Cat. No.01EX468).

Evaluation of Si Nanowires through Device Characteristics and Improvement in Uniformity of Si Nanowire Width Using Self-limiting Oxidation

E. Suzuki, K. Ishii, K. Tomizawa, 2001 .

Fabrication technology of a Si nanowire memory transistor using an inorganic electron beam resist process

E. Suzuki, K. Ishii, Hirohisa Taguchi, 2000 .

Properties of Si nanowire devices fabricated by using an inorganic EB resist process

Hiroshi Hiroshima, Kenichi Ishii, Toshiyuki Tsutsumi, 2000 .

Fabrication technology of Si nanodot nanowire memory transistors using an inorganic EB resist process

E. Suzuki, K. Ishii, K. Tomizawa, 2000, Digest of Papers Microprocesses and Nanotechnology 2000. 2000 International Microprocesses and Nanotechnology Conference (IEEE Cat. No.00EX387).

Performance and yield enhancement of FPGAs with within-die variation using multiple configurations

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2007, FPGA '07.

Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations

Hanpei Koike, Toshiyuki Tsutsumi, Masakazu Hioki, 2008, TRETS.