J. Hudec

Design of the neural processor optimized for Xilinx Virtex FPGA devices

J. Hudec, M. Hust'ava, 2001, Proceedings of the 23rd International Conference on Information Technology Interfaces, 2001. ITI 2001..

Design methodology and practice of VLSI functional test synthesis

J. Hudec, 2001, Proceedings of the 23rd International Conference on Information Technology Interfaces, 2001. ITI 2001..