Ronald Herrmann

Computing binary decision diagrams for VHDL data types

Hergen Pargmann, Ronald Herrmann, R. Herrmann, 1994, EURO-DAC '94.

Verification of a production cell using an automatic verification environment for VHDL

Ronald Herrmann, Thomas Reielts, R. Herrmann, 1995, Proceedings of EURO-DAC. European Design Automation Conference.

Translating VHDL into functional symbolic finite-state models

Hergen Pargmann, Ronald Herrmann, Gert Döhmen, 1995, Formal Methods Syst. Des..

Effizientes symbolisches Model-Checking von Realzeitaspekten für VHDL

Ronald Herrmann, 1998 .

Siemens Industrial Experience

Thomas Filkorn, Jörg Bormann, Ronald Herrmann, 1997 .

A Deterministic Finite-State Model for VHDL

Ronald Herrmann, Gert Döhmen, 1995 .

Model Checking Using Adaptive State and Data Abstraction

Hergen Pargmann, Dennis Dams, Rob Gerth, 1994, CAV.