Vincent Wiaux

发表

Through-pitch low-k1 contact hole imaging with CPL technology

Vincent Wiaux, Geert Vandenberghe, Kurt G. Ronse, 2004, Photomask Japan.

Double patterning design split implementation and validation for the 32nm node

Vincent Wiaux, Eric Hendrickx, Staf Verhaegen, 2007, SPIE Advanced Lithography.

Lithography Options for the 32 nm Half Pitch Node and Beyond

Vincent Wiaux, Geert Vandenberghe, Eric Hendrickx, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

Large-scale production techniques for photonic nanostructures

Vincent Wiaux, Bert Luyssaert, Wim Bogaerts, 2003, SPIE Optics + Photonics.

Experimental verification of high-NA imaging simulations using SHARP

Vincent Wiaux, Anton van Oosten, Timon Fliervoet, 2020, Photomask Technology.

OPC aware mask and wafer metrology

Vincent Wiaux, Kurt G. Ronse, Vicky Philipsen, 2002, European Mask and Lithography Conference.

Simulation of spacer-based SADP (Self-Aligned Double-Patterning) for 15nm half pitch

Vincent Wiaux, Stewart A. Robertson, Patrick Wong, 2013, Advanced Lithography.

Mighty high-T lithography for 65-nm generation contacts

Vincent Wiaux, Geert Vandenberghe, Will Conley, 2003, SPIE Advanced Lithography.

Characterization of a 'thermal freeze' litho-litho-etch (LLE) process for predictive simulation

Vincent Wiaux, John J. Biafore, Nadia Vandenbroeck, 2011, Advanced Lithography.

Low-loss photonic wires and compact ring resonators in silicon-on-insulator

Vincent Wiaux, Wim Bogaerts, Roel G. Baets, 2004, SPIE Photonics Europe.

Interactions of double patterning technology with wafer processing, OPC and design flows

Vincent Wiaux, Staf Verhaegen, Kevin Lucas, 2008, SPIE Advanced Lithography.

Silicon-on-insulator nanophotonics

Vincent Wiaux, Patrick Jaenen, Bert Luyssaert, 2005, SPIE Optics + Optoelectronics.

Double-patterning interactions with wafer processing, optical proximity correction, and physical design flows

Vincent Wiaux, Staf Verhaegen, Kevin Lucas, 2009 .

ArF solutions for low-k1 back-end imaging

Vincent Wiaux, Geert Vandenberghe, Will Conley, 2003, SPIE Advanced Lithography.

Reticle quality needs for advanced 193-nm lithography

Vincent Wiaux, Geert Vandenberghe, Kurt G. Ronse, 2001, Photomask Japan.

Litho-process-litho for 2D 32nm hp Logic and DRAM double patterning

Vincent Wiaux, Staf Verhaegen, Nadia Vandenbroeck, 2010, Advanced Lithography.

Litho1-litho2 proximity differences for LELE and LPLE double patterning processes

Vincent Wiaux, Jeroen Van de Kerkhove, Stewart Robertson, 2012, Advanced Lithography.

Mandrel-based patterning: density multiplication techniques for 15nm nodes

Vincent Wiaux, Ping Xu, Huixiong Dai, 2011, Advanced Lithography.

Stitching enablement for anamorphic imaging: a ~1μm exclusion band and its implications

Vincent Wiaux, Kars Zeger Troost, Eric Hendrickx, 2020 .

30nm half-pitch metal patterning using Moti CD shrink technique and double patterning

Vincent Wiaux, Mireille Maenhoudt, Johan Vertommen, 2008, SPIE Advanced Lithography.

Split and design guidelines for double patterning

Vincent Wiaux, Geert Vandenberghe, Patrick Jaenen, 2008, SPIE Advanced Lithography.

15nm HP patterning with EUV and SADP: key contributors for improvement of LWR, LER, and CDU

Vincent Wiaux, David Hellin, Johan Vertommen, 2013, Advanced Lithography.

Process, design and optical proximity correction requirements for the 65nm device generation

Vincent Wiaux, Geert Vandenberghe, Will Conley, 2003, SPIE Advanced Lithography.

A methodology for double patterning compliant split and design

Vincent Wiaux, Geert Vandenberghe, Mireille Maenhoudt, 2008, Lithography Asia.

Model based high NA anamorphic EUV RET

Vincent Wiaux, Germain Fenger, Eric Hendrickx, 2018, Advanced Lithography.

Printability verification for double-patterning technology

Vincent Wiaux, Mireille Maenhoudt, Staf Verhaegen, 2008, Photomask Technology.

Challenges in patterning 45nm node multiple-gate devices and SRAM cells

Vincent Wiaux, Rita Rooyackers, Staf Verhaegen, 2004 .

Checking design conformance and optimizing manufacturability using automated double patterning decomposition

Vincent Wiaux, Mireille Maenhoudt, Staf Verhaegen, 2008, SPIE Advanced Lithography.

Interactions between imaging layers during LPLE double patterning lithography

Vincent Wiaux, Stewart Robertson, Peter De Bisschop, 2012, Advanced Lithography.

Process development using negative tone development for the dark field critical layers in a 28nm node process

Vincent Wiaux, Peter De Bisschop, Monique Ercken, 2012, Advanced Lithography.

Comparisons of 9% versus 6% transmission attenuated phase-shift mask for the 65-nm device mode

Vincent Wiaux, Geert Vandenberghe, Will Conley, 2003, SPIE Photomask Technology.

Double patterning at NA 0.33 versus high-NA single exposure in EUV lithography: an imaging comparison

Vincent Wiaux, Lawrence S. Melvin, Vicky Philipsen, 2018, Advanced Lithography.

Key contributors for improvement of line width roughness, line edge roughness, and critical dimension uniformity: 15 nm half-pitch patterning with extreme ultraviolet and self-aligned double patterning

Vincent Wiaux, David Hellin, Johan Vertommen, 2013 .

Immersion lithography and double patterning in advanced microelectronics

Vincent Wiaux, Geert Vandenberghe, Mireille Maenhoudt, 2010, International Conference on Micro- and Nano-Electronics.

Tuning and simulating a 193-nm resist for 2D applications

Vincent Wiaux, Jeff D. Byers, Monique Ercken, 2002, SPIE Advanced Lithography.

Optical extensions integration for a 0.314-μm2 45-nm node 6-transistor SRAM cell

Vincent Wiaux, Geert Vandenberghe, Eric Hendrickx, 2005, SPIE Advanced Lithography.

Double pattern EDA solutions for 32nm HP and beyond

Vincent Wiaux, Eric Hendrickx, Staf Verhaegen, 2007, SPIE Advanced Lithography.

Assessment of OPC effectiveness using two-dimensional metrics

Vincent Wiaux, Geert Vandenberghe, Kurt G. Ronse, 2002, SPIE Advanced Lithography.

Double-patterning decomposition, design compliance, and verification algorithms at 32nm hp

Vincent Wiaux, Andres Torres, Emile Sahouria, 2008, Photomask Technology.

248nm and 193nm lithography for damascene patterning

Vincent Wiaux, Kurt G. Ronse, Mireille Maenhoudt, 2001 .

Application challenges with double patterning technology (DPT) beyond 45 nm

Vincent Wiaux, Geert Vandenberghe, Jo Finders, 2006, SPIE Photomask Technology.

Spacer defined double patterning for (sub-)20nm half pitch single damascene structures

Vincent Wiaux, Harold Dekkers, Gerald Beyer, 2011, Advanced Lithography.

Modeling EUVL patterning variability for metal layers in 5nm technology node and its effect on electrical resistance

Lawrence S. Melvin, Vincent Wiaux, Vicky Philipsen, 2017, Advanced Lithography.

Integration of tall triple-gate devices with inserted TaxNy gate in a 0.274µm2 6T-SRAM cell and advanced CMOS logic circuits

Vincent Wiaux, Geert Vandenberghe, Patrick Jaenen, 2005 .

Manufacturability issues with double patterning for 50-nm half-pitch single damascene applications using RELACS shrink and corresponding OPC

Vincent Wiaux, Ivan Ciofi, Herbert Struyf, 2007, SPIE Advanced Lithography.

Mask 3D effects experimental measurements with NA 0.55 anamorphic imaging (Conference Presentation)

Vincent Wiaux, Vicky Philipsen, Eric Hendrickx, 2018, International Conference on Extreme Ultraviolet Lithography 2018.

Exploration of etch step interactions in the dual patterning process for process modeling

Vincent Wiaux, Lawrence S. Melvin, Mireille Maenhoudt, 2008 .