C. Nicoletta

SP 25.2: A 250MHz 5W RISC Microprocessor with On-Chip L2 Cache Controller

Hector Sanchez, Paul A. Reed, M. Alexander, 1997 .

A 450-MHz RISC microprocessor with enhanced instruction set and copper interconnect

Michael Snyder, Minh Vo, Hector Sanchez, 1999 .

A versatile 3.3 V/2.5 V/1.8 V CMOS I/O driver built in a 0.2 /spl mu/m 3.5 nm Tox 1.8 V CMOS technology

H. Sanchez, C. Nicoletta, G. Gerosa, 1999, 1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).

A 200 MHz 2.5 V 4 W superscalar RISC microprocessor

H. Sanchez, C. Nicoletta, I. Vo, 1996, 1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.

A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller

Paul A. Reed, C. Nicoletta, Gianfranco Gerosa, 1997 .

A 250 MHz 5 W RISC microprocessor with on-chip L2 cache controller

C. Nicoletta, L. Eisen, H. Sanchez, 1997, 1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.